Enhanced implementation of the NTRUEncrypt algorithm using graphics cards

The NTRU encryption algorithm, also known as NTRUEncrypt, is a parameterized family of lattice-based public key cryptosystems that has been accepted to the IEEE P1363 standards under the specifications for lattice-based public-key cryptography (IEEE P1363.1). The operations of the NTRU encryption algorithm show good characteristics for data parallel processing which makes the NTRU a good candidate to benefit from the high degree of parallelism available in modern graphics processing units (GPUs). In this paper, we investigate different GPU implementation options for the NTRU encryption algorithm. Our implementation, on the NVIDIA GTX275 GPU, using the CUDA framework, achieves about 77 MB/s for NTRU with the parameter set (N, q, p) = (1171, 2048, 3).

[1]  Alexander Ottesen,et al.  Efficient parallelisation techniques for applications running on GPUs using the CUDA framework , 2009 .

[2]  Pat Hanrahan,et al.  Brook for GPUs: stream computing on graphics hardware , 2004, ACM Trans. Graph..

[3]  Joseph H. Silverman,et al.  Optimizations for NTRU , 2001 .

[4]  S.A. Manavski,et al.  CUDA Compatible GPU as an Efficient Hardware Accelerator for AES Cryptography , 2007, 2007 IEEE International Conference on Signal Processing and Communications.

[5]  Tong-Yee Lee,et al.  Motion overview of human actions , 2008, SIGGRAPH 2008.

[6]  A. A. Kamal,et al.  An FPGA implementation of the NTRUEncrypt cryptosystem , 2009, 2009 International Conference on Microelectronics - ICM.

[7]  Tim Güneysu,et al.  Exploiting the Power of GPUs for Asymmetric Cryptography , 2008, CHES.

[8]  Angelos D. Keromytis,et al.  CryptoGraphics: Secret Key Cryptography Using Graphics Cards , 2005, CT-RSA.

[9]  Gorka Lerchundi Osa.  Fast Implementation of Two Hash Algorithms on nVidia CUDA GPU , 2009 .

[10]  John Waldron,et al.  AES Encryption Implementation and Analysis on Commodity Graphics Processing Units , 2007, CHES.

[11]  Edward T. Grochowski,et al.  Larrabee: A many-Core x86 architecture for visual computing , 2008, 2008 IEEE Hot Chips 20 Symposium (HCS).

[12]  Urmas Rosenberg,et al.  Using Graphic Processing Unit in Block Cipher Calculations , 2007 .

[13]  Frederik Vercauteren,et al.  Speed Records for NTRU , 2010, CT-RSA.

[14]  IEEE P1363.1TMD,et al.  IEEE P1363.1 Draft 10: Draft Standard for Public Key Cryptographic Techniques Based on Hard Problems over Lattices , 2008, IACR Cryptol. ePrint Arch..

[15]  Joseph H. Silverman,et al.  Random small Hamming weight products with applications to cryptography , 2003, Discret. Appl. Math..

[16]  Sarah Meiklejohn,et al.  Review of an introduction to mathematical cryptography by Jeffrey Hoffstein, Jill Pipher, and Joseph Silverman Springer-Verlag, 2008 , 2010, SIGA.

[17]  Joseph H. Silverman,et al.  NTRU in Constrained Devices , 2001, CHES.

[18]  Mariano Monteverde Giacomino.  NTRU software implementation for constrained devices , 2008 .

[19]  Moti Yung,et al.  High-Speed Implementations of Block Cipher ARIA Using Graphics Processing Units , 2008, 2008 International Conference on Multimedia and Ubiquitous Engineering (mue 2008).