A CMOS dual-band tri-mode chipset for IEEE 802.11a/b/g wireless LAN

This paper presents the design of a dual-band, tri-mode wireless LAN chipset for IEEE 802.11a/b/g. The chipset, designed in 0.25/spl mu/m standard CMOS, features a 5GHz RF transceiver, a 2.4GHz RF transceiver, and a baseband processor with media access controller. The overall design achieves a measured sensitivity of at least -70dBm at 54Mbps and -92dBm at 6Mbps for IEEE 802.11a/g as well as -94dBm at 1Mbps for 802.11b.