Simulating real-time software components based on logical execution time

Real-time software components based on the logical execution time (LET) paradigm exhibit equivalent observable behavior independent from the execution platform respectively the simulation environment. Thus, LET ensures a perfect match between simulation and execution on a potentially distributed hardware without having to consider platform specific details already in the application model. Especially for complex multi-mode multi-rate systems, a virtual machine (VM) is the favored approach to ensure the correct timing behavior. Simulation environments typically provide a trigger mechanism that allows for implementing such a VM. This paper discusses data dependency problems that may arise when simulating LET-based components and which considerably limit the applicability of existing approaches in practice. The identified shortcomings concern components with cyclic data flow, control loops involving plants without delay, and the combination of LET-based and conventional components. We present an execution mechanism based on a 2-step 3-phase VM architecture that overcomes these limitations. The presented approach is implemented in MATLAB/Simulink and applicable for mixed time- and event-triggered systems.