Design and Optimization of ARINC 659 Transceiver

ARINC 659 bus is a kind of wired-OR bus which was widely used in aeronautic electric equipment.In the article a 8 channels ARINC 659 transceiver was designed and optimized.Firstly,the backplane environment was investigated with respect to physical effect,load and transition characteristic.Secondly,the BTL standard,the bus structure and the application factor are taking into account in this design.Finally,the chip was made with 0.35μm BiComs process with 8 channels in a chip.The test results show that the transmit functions are realized,DC,AC parameter fit IEEE 1194.1 and ARINC 659 physical layer definition.In conclusion,the design work fulfills all the functions which were designed,the chip can be used as ARINC 659 physical layer transceiver with low bit error rate.