Applications of evolutionary algorithms in the design automation of analog integrated circuits
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G. Rodriguez | E. Tlelo-Cuau | I. Guerra-Gom | M. A. Duarte-Vil | Luis G. de la Frag | G. Flores-Bec | G. Reyes-Salg | C. A. Reyes-Garc | E. Tlelo-Cuau | I. Guerra-Gom | G. Flores-Bec | G. Reyes-Salg | G. Rodríguez
[1] Nuno Horta,et al. Analog circuits optimization based on evolutionary computation techniques , 2010, Integr..
[2] Giuseppe Nicosia,et al. An evolutionary algorithm-based approach to robust analog circuit design using constrained multi-objective optimization , 2007, Knowl. Based Syst..
[3] Ulf Schlichtmann,et al. The Sizing Rules Method for CMOS and Bipolar Analog Integrated Circuit Synthesis , 2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[4] A.N. Chandorkar,et al. A Novel Approach to Link Process Parameters to BSIM Model Parameters , 2009, IEEE Transactions on Semiconductor Manufacturing.
[5] Varun Aggarwal. Novel Canonic Current Mode DDCC Based SRCO Synthesized Using a Genetic Algorithm , 2004 .
[6] Trond Ytterdal,et al. Analog Circuit Design in Nanoscale CMOS Technologies , 2009, Proceedings of the IEEE.
[7] Kenneth S. Kundert,et al. Verification of Complex Analog and RF IC Designs , 2007, Proceedings of the IEEE.
[8] Mourad Loulou,et al. A novel heuristic for multi-objective optimization of analog circuit performances , 2009 .
[9] David V. Anderson,et al. Net-Sensitivity-Based Optimization of Large-Scale Field-Programmable Analog Array (FPAA) Placement and Routing , 2009, IEEE Transactions on Circuits and Systems II: Express Briefs.
[10] Josiah Adeyemo,et al. Strategies of differential evolution for optimum cropping pattern. , 2010 .
[11] Georges G. E. Gielen,et al. Classification of analog synthesis tools based on their architecture selection mechanisms , 2008, Integr..
[12] Carlos A. Coello Coello,et al. HCS: A New Local Search Strategy for Memetic Multiobjective Evolutionary Algorithms , 2010, IEEE Transactions on Evolutionary Computation.
[13] Zheng Wang,et al. Analog circuit optimization system based on hybrid evolutionary algorithms , 2009, Integr..
[14] Zhiming Wu,et al. A Hybrid Fine-Tuned Multi-Objective Memetic Algorithm , 2006, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..
[15] Rob A. Rutenbar,et al. Computer-aided design of analog and mixed-signal integrated circuits , 2000, Proceedings of the IEEE.
[16] Zeljko Zilic,et al. Performance-driven circuit and layout co-optimization for deep-submicron analog circuits , 2009 .
[17] Michiel Steyaert,et al. Variation-Aware Structural Synthesis of Analog Circuits via Hierarchical Building Blocks and Structural Homotopy , 2009, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[18] Yong-Bin Kim,et al. ASLIC: A low power CMOS analog circuit design automation , 2006, Integr..
[19] Francisco V. Fernández,et al. Multimode Pareto fronts for design of reconfigurable analogue circuits , 2009 .
[20] Georges G. E. Gielen,et al. Simulation-based generation of posynomial performance models for the sizing of analog integrated circuits , 2003, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[21] Francisco V. Fernández,et al. A memetic approach to the automatic design of high-performance analog integrated circuits , 2009, TODE.
[22] Georges G. E. Gielen,et al. Globally Reliable Variation-Aware Sizing of Analog Integrated Circuits via Response Surfaces and Structural Homotopy , 2009, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[23] Georges Gielen,et al. Generalized Simulation-Based Posynomial Model Generation for Analog Integrated Circuits , 2004 .
[24] Yoshiaki Tadokoro,et al. Synthesis of current mirrors based on evolutionary graph generation with transmigration capability , 2007, IEICE Electron. Express.
[25] J. B. Grimbleby,et al. Automatic analogue circuit synthesis using genetic algorithms , 2000 .
[26] Esteban Tlelo-Cuautle,et al. Designing VFs by applying genetic algorithms from nullator-based descriptions , 2007, 2007 18th European Conference on Circuit Theory and Design.
[27] Georges Gielen,et al. Sizing mixed-mode circuits by multi-objective evolutionary algorithms , 2010, 2010 53rd IEEE International Midwest Symposium on Circuits and Systems.
[28] David Ilsen,et al. Algebraic and Combinatorial Algorithms for Translinear Network Synthesis , 2008, IEEE Transactions on Circuits and Systems I: Regular Papers.
[29] Bruno Sareni,et al. Optimal sizing of an embedded electrical system with an approach for limiting the search space , 2009 .
[30] M. Amiri,et al. A Methodology for Optimizing Statistical Multi-Response Problems Using Genetic Local Search Algorithm Through Fuzzy Goal Programming , 2008 .
[31] E. Tlelo-Cuautle,et al. Non-sorting genetic algorithm in the optimization of unity-gain cells , 2009, 2009 6th International Conference on Electrical Engineering, Computing Science and Automatic Control (CCE).
[32] Mohamed I. Elmasry,et al. MOS current mode circuits: analysis, design, and variability , 2005, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[33] Katsumi Homma,et al. Find the 'Best' Solution from Multiple Analog Topologies via Pareto-Optimality , 2009, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..
[34] Carlos A. Coello Coello,et al. Recent Trends in Evolutionary Multiobjective Optimization , 2005, Evolutionary Multiobjective Optimization.
[35] Rob A. Rutenbar,et al. Efficient handling of operating range and manufacturing linevariations in analog cell synthesis , 2000, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[36] Peter Rockett,et al. The influence of mutation on population dynamics in multiobjective genetic programming , 2010, Genetic Programming and Evolvable Machines.
[37] John R. Koza,et al. Synthesis of topology and sizing of analog electrical circuits by means of genetic programming , 2000 .
[38] Francisco V. Fernández,et al. An Integrated Layout-Synthesis Approach for Analog ICs , 2008, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[39] P. P. Chakrabarti,et al. A synthesis system for analog circuits based on evolutionary search and topological reuse , 2005, IEEE Transactions on Evolutionary Computation.
[40] Esteban Tlelo-Cuautle,et al. Fuzzy-set based approach to compute optimum sizes of Voltage Followers , 2009, 2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009).
[41] Stephen P. Boyd,et al. Optimal design of a CMOS op-amp via geometric programming , 2001, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[42] G. Gielen,et al. Decomposition-based multi-objective optimization of second-generation current conveyors , 2009, 2009 52nd IEEE International Midwest Symposium on Circuits and Systems.
[43] Mourad Loulou,et al. Analog circuit design optimization through the particle swarm optimization technique , 2010 .
[44] Zhuo Feng,et al. Performance-Oriented Parameter Dimension Reduction of VLSI Circuits , 2009, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.
[45] Georges G. E. Gielen,et al. Optimizing current conveyors by evolutionary algorithms including differential evolution , 2009, 2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009).
[46] Takahiro Watanabe,et al. Circuit Design Optimization Using Genetic Algorithm with Parameterized Uniform Crossover , 2010, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..
[47] E.F. de Arruda,et al. Harmonic Distortion State Estimation Using an Evolutionary Strategy , 2010, IEEE Transactions on Power Delivery.
[48] Dario Floreano,et al. Analog Genetic Encoding for the Evolution of Circuits and Networks , 2007, IEEE Transactions on Evolutionary Computation.
[49] Josiah Adeyemo,et al. Multi-Objective Differential Evolution Algorithm for Solving Engineering Problems , 2009 .
[50] G.E. Muller-L. A General Yield Model From Design to Product Engineering , 2009, IEEE Transactions on Semiconductor Manufacturing.
[51] Varun Aggarwal,et al. Evolving sinusoidal oscillators using genetic algorithms , 2003, NASA/DoD Conference on Evolvable Hardware, 2003. Proceedings..
[52] Fang Liu,et al. Parametric variability analysis for multistage analog circuits using analytical sensitivity modeling , 2008, TODE.
[53] Yih-Lang Li,et al. Electronic design automation using a unified optimization framework , 2008, Math. Comput. Simul..
[54] Georges G. E. Gielen,et al. Template-Free Symbolic Performance Modeling of Analog Circuits via Canonical-Form Functions and Genetic Programming , 2009, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.
[55] G. A. Armstrong,et al. Impact of gate?source/drain channel architecture on the performance of an operational transconductance amplifier (OTA) , 2009 .
[56] Georges G. E. Gielen,et al. WATSON: design space boundary exploration and model generation for analog and RFIC design , 2003, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[57] Li Zhihuan,et al. Non-dominated sorting genetic algorithm-II for robust multi-objective optimal reactive power dispatch , 2010 .
[58] Alex Doboli,et al. Exploration-based high-level synthesis of linear analog systems operating at low/medium frequencies , 2003, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..