Strong Performance Guarantees for Asynchronous Buffered Crossbar Schedulers

Crossbar-based switches are commonly used to implement routers with throughputs up to about 1 Tb/s. The advent of crossbar scheduling algorithms that provide strong performance guarantees now makes it possible to engineer systems that perform well, even under extreme traffic conditions. Until recently, such performance guarantees have only been developed for crossbars that switch cells rather than variable length packets. Cell-based crossbars incur a worst-case bandwidth penalty of up to a factor of two, since they must fragment variable length packets into fixed length cells. In addition, schedulers for cell-based crossbars may fail to deliver the expected performance guarantees when used in routers that forward packets. We show how to obtain performance guarantees for asynchronous crossbars that are directly comparable to those previously developed for synchronous, cell-based crossbars. In particular we define derivatives of the group by virtual output queue (GVOQ) scheduler of Chuang and the least occupied output first scheduler of Krishna and show that both can provide strong performance guarantees in systems with speedup 2. Specifically, we show that these schedulers are work-conserving and that they can emulate an output-queued switch using any queueing discipline in the class of restricted Push-In, First-Out queueing disciplines. We also show that there are schedulers for segment-based crossbars, (introduced recently by Katevenis and Passas) that can deliver strong performance guarantees with small buffer requirements and no bandwidth fragmentation.

[1]  Rui Zhang,et al.  Routers with a single stage of buffering , 2002, SIGCOMM '02.

[2]  Hagit Attiya,et al.  Packet-Mode Emulation of Output-Queued Switches , 2006, IEEE Transactions on Computers.

[3]  Nick McKeown,et al.  Matching output queueing with a combined input output queued switch , 1999, IEEE INFOCOM '99. Conference on Computer Communications. Proceedings. Eighteenth Annual Joint Conference of the IEEE Computer and Communications Societies. The Future is Now (Cat. No.99CH36320).

[4]  Satoshi Nojima,et al.  Integrated Services Packet Network Using Bus Matrix Switch , 1987, IEEE J. Sel. Areas Commun..

[5]  Anna Charny,et al.  On the speedup required for work-conserving crossbar switches , 1999, IEEE J. Sel. Areas Commun..

[6]  Mounir Hamdi,et al.  MCBF: a high-performance scheduling algorithm for buffered crossbar switches , 2003, IEEE Communications Letters.

[7]  Barry D. Wessler Packet switching , 2003 .

[8]  Jonathan S. Turner,et al.  When is a Work-Conserving Switch Not? , 2005 .

[9]  R. Rojas-Cessa,et al.  CIXB-1: combined input-one-cell-crosspoint buffered switch , 2001, 2001 IEEE Workshop on High Performance Switching and Routing (IEEE Cat. No.01TH8552).

[10]  Nick McKeown,et al.  Matching output queueing with a combined input/output-queued switch , 1999, IEEE J. Sel. Areas Commun..

[11]  Jean C. Walrand,et al.  Achieving 100% throughput in an input-queued switch , 1996, Proceedings of IEEE INFOCOM '96. Conference on Computer Communications.

[12]  Devavrat Shah,et al.  Input queued switches: cell switching vs. packet switching , 2003, IEEE INFOCOM 2003. Twenty-second Annual Joint Conference of the IEEE Computer and Communications Societies (IEEE Cat. No.03CH37428).

[13]  Nick McKeown,et al.  The iSLIP scheduling algorithm for input-queued switches , 1999, TNET.

[14]  Ioannis Papaefstathiou,et al.  Variable packet size buffered crossbar (CICQ) switches , 2004, 2004 IEEE International Conference on Communications (IEEE Cat. No.04CH37577).

[15]  Jonathan Turner,et al.  Strong Performance Guarantees for Asynchronous Crossbar Schedulers , 2006, Proceedings IEEE INFOCOM 2006. 25TH IEEE International Conference on Computer Communications.

[16]  Robert B. Magill,et al.  Output-queued switch emulation by fabrics with limited memory , 2003, IEEE J. Sel. Areas Commun..

[17]  Manolis Katevenis,et al.  Variable-size multipacket segments in buffered crossbar (CICQ) architectures , 2005, IEEE International Conference on Communications, 2005. ICC 2005. 2005.

[18]  Hui Zhang,et al.  Implementing distributed packet fair queueing in a scalable switch architecture , 1998, Proceedings. IEEE INFOCOM '98, the Conference on Computer Communications. Seventeenth Annual Joint Conference of the IEEE Computer and Communications Societies. Gateway to the 21st Century (Cat. No.98.

[19]  J. Saxe,et al.  An Efficient Matching Algorithm for a High-Throughput , Low-Latency Data Switch , 1998 .

[20]  Leonard Kleinrock,et al.  Virtual Cut-Through: A New Computer Communication Switching Technique , 1979, Comput. Networks.

[21]  Marco Ajmone Marsan,et al.  On the stability of input-queued switches with speed-up , 2001, TNET.

[22]  Nick McKeown,et al.  Practical algorithms for performance guarantees in buffered crossbars , 2005, Proceedings IEEE 24th Annual Joint Conference of the IEEE Computer and Communications Societies..

[23]  Hagit Attiya,et al.  Packet-Mode Emulation of Output-Queued Switches , 2010, IEEE Trans. Computers.

[24]  Marco Ajmone Marsan,et al.  Packet-mode scheduling in input-queued cell-based switches , 2002, TNET.

[25]  Thomas E. Anderson,et al.  High-speed switch scheduling for local-area networks , 1993, TOCS.