Software-based self-repair of statically scheduled superscalar data paths
暂无分享,去创建一个
[1] Heinrich Theodor Vierhaus,et al. Embedded Self Repair by Transistor and Gate Level Reconfiguration , 2006, 2006 IEEE Design and Diagnostics of Electronic Circuits and systems.
[2] Ramesh Karri,et al. Computer-Aided Design of Fault-Tolerant VLSI Systems , 1996, IEEE Des. Test Comput..
[3] Heinrich Theodor Vierhaus,et al. Repair Functions and Redundancy Management for Bus Structures , 2007 .
[4] Heinrich Theodor Vierhaus,et al. Built-in self repair by reconfiguration of FPGAs , 2006, 12th IEEE International On-Line Testing Symposium (IOLTS'06).
[5] Manoj Franklin. Incorporating fault tolerance in superscalar processors , 1996, Proceedings of 3rd International Conference on High Performance Computing (HiPC).
[6] Kaushik Roy,et al. Enhancing yield at the end of the technology roadmap , 2004, IEEE Design & Test of Computers.
[7] Seth Copen Goldstein,et al. Defect tolerance at the end of the roadmap , 2003 .
[8] Alex Orailoglu. Microarchitectural synthesis of gracefully degradable, dynamically reconfigurable ASICs , 1996, Proceedings International Conference on Computer Design. VLSI in Computers and Processors.
[9] Mehdi Baradaran Tahoori,et al. Guest Editors' Introduction: Challenges for Reliable Design at the Nanoscale , 2005, IEEE Des. Test Comput..
[10] Manoj Franklin. A study of time redundant fault tolerance techniques for superscalar processors , 1995, Proceedings of International Workshop on Defect and Fault Tolerance in VLSI.
[11] Edward J. McCluskey,et al. Reconfigurable architecture for autonomous self-repair , 2004, IEEE Design & Test of Computers.
[12] Miodrag Potkonjak,et al. Computer Aided Design of Fault-Tolerant Application Specific Programmable Processors , 2000, IEEE Trans. Computers.
[13] Shi-Jinn Horng,et al. An integrated fault-tolerant design framework for VLIW processors , 2003, Proceedings 18th IEEE Symposium on Defect and Fault Tolerance in VLSI Systems.