Multistage networks are strong candidates for implementation of ATM switching fabrics in B-ISDN networks. Among a number of proposed multistage networks, the Banyan network with its self-routing property, modular structure and suitability for VLSI implementation has received much attention. But the Banyan network suffers from internal link blocking and output port blocking. The Batcher sorting network was proposed to prevent internal link blocking, but it cannot prevent output port blocking. We present a new "Relay Chain" (RC) contention control network to prevent output port blocking. A parallel input buffer is adopted, with a special relay chain controller to solve the head of line (HOL) blocking problem normally associated with the input buffer strategy. The relay chain bus structure has a simple topology and makes the contention control network easy to implement. Performance analysis shows that this switch architecture achieves low cell loss rate together with the high throughput normally associated with output buffering.
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