Fully differential, 40 Gb/s regulated cascode transimpedance amplifier in 0.13 µm SiGe BiCMOS technology

A broadband differential Transimpedance amplifier (TIA) has been designed and measured in 0.13µm BiCMOS Technology. Regulated Cascode (RGC) configuration has been employed to reduce the effect of the large parasitic capacitor of the PIN diode. The added CPD, representing PIN diode parasitic capacitor, is 300fF. The TIA has 53.6 dBO differential transimpedance gain and 28GHz measured bandwidth. The total measured integrated input referred noise is 6.11µArms. The TIA chip including the TIA and 3 stages of buffer consumes 110mW power from a 3V power supply. The active chip area is 330µm×210µm and the total chip area including the pads is 1050µm×530µm.

[1]  Shen-Iuan Liu,et al.  40 Gb/s Transimpedance-AGC Amplifier and CDR Circuit for Broadband Data Receivers in 90 nm CMOS , 2008, IEEE Journal of Solid-State Circuits.

[2]  Jun-De Jin,et al.  40-Gb/s Transimpedance Amplifier in 0.18-μm CMOS Technology , 2006, 2006 Proceedings of the 32nd European Solid-State Circuits Conference.

[3]  Samuel A. Steidl,et al.  A transimpedance amplifier for OC-768 applications designed using a SiGe HBT BiCMOS technology , 2002, Optical Fiber Communication Conference and Exhibit.

[4]  Eduard Säckinger.  Broadband Circuits for Optical Fiber Communication: Säckinger/Broadband , 2005 .

[5]  B. Jagannathan,et al.  40 Gbit/sec circuits built from a 120 GHz f/sub T/ SiGe technology , 2001, GaAs IC Symposium. IEEE Gallium Arsenide Integrated Circuit Symposium. 23rd Annual Technical Digest 2001 (Cat. No.01CH37191).

[6]  Alvin J. Joseph,et al.  40-Gb/s Circuits Built From a 120-GHz , 2002 .

[7]  E. Sackinger,et al.  Broadband Circuits for Optical Fiber Communication , 2005 .