Intelligent Memory: An Architecture for Lock-Free Synchronization (Special Issue on Parallel and Distributed Supercomputing)

This paper presents intelligent memory, a new memory architecture capable of providing e cient lock-free synchronization. In the intelligent memory, a sequence of operations on a shared object associated with that memory module can be processed without any intervention so that an environment for the synchronization can be provided by executing a critical section itself in that memory module. For this, we present a memory architecture for intelligent memory having minimal instruction set and develop a programming model, called Critical Section Procedure (CSP), which consists of a shared data structure and operations on it. Intelligent memory is intended to eliminate waste of processing time such as busy waiting in spin lock and retry due to process contention in existing lock-free synchronization schemes. Simulation results show that intelligent memory provides better throughput compared with a spin lock and the existing lock-free synchronization.