Multi-path accessible semiconductor memory device having register access circuit

A multi-path accessible semiconductor memory device having a register access circuit is provided to reduce power consumption, by disabling a corresponding word line when a specific address is inputted and enabling a DRAM interface. According to a semiconductor memory device, a shared memory region has a data access path with one of ports installed independently in correspondence to a plurality of processors and is accessed by the plurality of processors selectively, and is allocated in a memory cell array. An interface(170) has a semaphore region, mail box regions and check regions accessed by replacing a specific address of the shared memory region in order to provide an interface function during communication among the plurality of processors. A register access circuit(100) prevents access to memory cells corresponding to the specific address, and enables the interface.