A Game Theory-Based Heuristic for the Two-Dimensional VLSI Global Routing Problem

In this work we propose a game theory (GT)-based global router. It works in two steps: (i) Initial routing of all nets using maze routing with framing (MRF) and (ii) GT-based rip-up and reroute (R&R) process. In initial routing, the nets are divided into several small subsets which are routed concurrently using multithreading (MT). The main task of the GT-based R&R process is to eliminate congestion. Nets are considered as players and each player employs two pure strategies: (attempt to improve its spanning tree, and, do not attempt to improve its spanning tree). The nets also have mixed strategies whose values act as probabilities for them to select any particular pure strategy. The nets which select their first strategy will go through the R&R operation. We also propose an algorithm which computes the mixed strategies of nets. The advantage of using GT to select nets is that it reduces the number of nets and the number of iterations in the R&R process. The performance of the proposed global router was evaluated on ISPD'98 benchmarks and compared with two recent global routers, namely, Box Router 2.0 (configured for speed) and Side-winder. The results show that the proposed global router with MT has a shorter runtime to converge to a valid solution than that of Box Router 2.0. It also outperforms Side-winder in terms of routability. The experimental results demonstrated that GT is a valuable technique in reducing the runtime of global routers.

[1]  Yao-Wen Chang,et al.  Global and detailed routing , 2009 .

[2]  B. Martin Electronic design automation [1999 technology analysis and forecast] , 1999 .

[3]  Jin Hu,et al.  High-performance Global Routing for Trillion-gate Systems-on-Chips , 2013 .

[4]  Abdellah Salhi,et al.  A Game Theory-Based Multi-Agent System for Expensive Optimisation Problems , 2010 .

[5]  Tao Huang,et al.  Ripple: A Robust and Effective Routability-Driven Placer , 2013, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[6]  David Z. Pan,et al.  BoxRouter: A New Global Router Based on Box Expansion and Progressive ILP , 2006, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[7]  Azadeh Davoodi,et al.  A parallel integer programming approach to global routing , 2010, Design Automation Conference.

[8]  Fotini-Niovi Pavlidou,et al.  Game theory for routing modeling in communication networks — A survey , 2008, Journal of Communications and Networks.

[9]  Charles J. Alpert,et al.  The ISPD98 circuit benchmark suite , 1998, ISPD '98.

[10]  Thomas Lengauer,et al.  Combinatorial algorithms for integrated circuit layout , 1990, Applicable theory in computer science.

[11]  Naehyuck Chang,et al.  Energy-Aware Clock-Frequency Assignment in Microprocessors and Memory Devices for Dynamic Voltage Scaling , 2007, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[12]  Jin Hu,et al.  Sidewinder: a scalable ILP-based router , 2008, SLIP '08.

[13]  Shawki Areibi,et al.  A comparison of hardware acceleration methods for VLSI Maze routing , 2009, 2009 IEEE Toronto International Conference Science and Technology for Humanity (TIC-STH).

[14]  Sanghamitra Roy,et al.  Exploring high throughput computing paradigm for global routing , 2011, 2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

[15]  Hanna Bogucka,et al.  Game theory in wireless networks , 2011 .

[16]  Kun Yuan,et al.  BoxRouter 2.0: A hybrid and robust global router with layer assignment for routability , 2009, TODE.

[17]  Masayoshi Tachibana,et al.  A Hardware Maze Router with Application to Interactive Rip-Up and Reroute , 1986, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.