Three-dimensional digital filtering algorithm for parallel DSP implementation

In this paper we present a 3-D parallel filtering algorithm. This algorithm is highly parallel and efficient as it eliminates the overhead associated with the overlapping segments in the block-filtering approach. It also lifts the restrictions on the input size for high efficiency in the block-filtering algorithm, as both the 3-D input data and impulse response of the system are decimated into eight subsections each. These subsections can be simultaneously and independently processed. The results of the implementation of the 3-D parallel filtering algorithm on multiDSP platform is presented and discussed showing a high performance reflected by the highly parallel architecture and good memory distribution of the 3-D parallel algorithm.

[1]  Nicolas Demassieux,et al.  Optimization of real-time VLSI architectures for distributed arithmetic-based algorithms: application to HDTV filters , 1994, Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94.

[2]  Pinaki Mazumder Parallel VLSI-routing models for polymorphic processors array , 1997 .

[3]  Dan I. Moldovan,et al.  Parallel processing - from applications to systems , 1993 .

[4]  M.L.C. Hamilton The application of multiprocessor DSP to machine vision , 1995 .

[5]  M. Aziz,et al.  A hybrid parallel algorithm for digital image filtering applications , 2000, ICECS 2000. 7th IEEE International Conference on Electronics, Circuits and Systems (Cat. No.00EX445).

[6]  Danny Crookes,et al.  Parallel architectures for image processing , 1998 .

[7]  K. Ronner,et al.  A 1.3 GOPS parallel DSP for high performance image processing applications , 2000, Proceedings of the 25th European Solid-State Circuits Conference.