Suppression of corner effects in wide-channel triple-gate bulk FinFETs
暂无分享,去创建一个
[1] C. Hu,et al. FinFET-a self-aligned double-gate MOSFET scalable to 20 nm , 2000 .
[2] Yuan Taur,et al. Fundamentals of Modern VLSI Devices , 1998 .
[3] J. Bokor,et al. FinFET-a quasi-planar double-gate MOSFET , 2001, 2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177).
[4] Bin Yu,et al. FinFET scaling to 10 nm gate length , 2002, Digest. International Electron Devices Meeting,.
[5] S. Hareland,et al. Tri-Gate fully-depleted CMOS transistors: fabrication, design and layout , 2003, 2003 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.03CH37407).
[6] Tomislav Suligoj,et al. Improving bulk FinFET DC performance in comparison to SOI FinFET , 2009 .
[7] S. Wolf,et al. Silicon Processing for the VLSI Era , 1986 .
[8] Jean-Pierre Colinge,et al. Quantum-mechanical effects in nanometer scale MuGFETs , 2008 .
[9] U-In Chung,et al. Body-tied triple-gate NMOSFET fabrication using bulk Si wafer , 2005 .
[10] S. Decoutere,et al. Gate voltage and geometry dependence of the series resistance and of the carrier mobility in FinFET devices , 2008 .