An artificial intelligence approach to multi-level mixed-mode qualitative simulation of CMOS ICs

Abstract Multi-level circuit simulators have been developed by researchers to reduce the simulation complexity for ICs manufactured by VLSI and beyond technologies. The main problems with these simulators have been the identification of sub-circuits which is usually left to the user and the communication between different levels for increased efficiency. We have developed a multi-level simulator which is capable of generating the sub-circuit blocks appropriate for the simulator being used from a device-level circuit description and uses qualitative simulation approaches. The use of qualitative simulator facilitates the transfer of information between digital and analog blocks. Our simulator uses three different simulation levels; gate-level, switch-level, and device-level. The amount of data transferred between different levels are analyzed for test circuits which require simulation at all three levels. Simulation results are also presented for test circuits for verification.