An 8$\times$ 8 Cell Analog Order-Statistic-Filter Array With Asynchronous Grayscale Morphology in 0.13-$\mu{\hbox{m}}$ CMOS
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[1] Jaakko Astola,et al. Detail preserving morphological filtering , 1992, Proceedings., 11th IAPR International Conference on Pattern Recognition. Vol. III. Conference C: Image, Speech and Signal Analysis,.
[2] John Lazzaro,et al. Winner-Take-All Networks of O(N) Complexity , 1988, NIPS.
[3] Piotr Dudek,et al. ASPA: Focal Plane digital processor array with asynchronous processing capabilities , 2008, 2008 IEEE International Symposium on Circuits and Systems.
[4] Piotr Dudek,et al. Architecture of a VLSI cellular processor array for synchronous/asynchronous image processing , 2006, 2006 IEEE International Symposium on Circuits and Systems.
[5] A. Paasio,et al. Mismatch-tolerant asynchronous grayscale morphological reconstruction , 2005, 2005 9th International Workshop on Cellular Neural Networks and Their Applications.
[6] M.J.M. Pelgrom,et al. Matching properties of MOS transistors , 1989 .
[7] Moncef Gabbouj,et al. Weighted median filters: a tutorial , 1996 .
[8] Piotr Dudek,et al. A general-purpose processor-per-pixel analog SIMD vision chip , 2005, IEEE Transactions on Circuits and Systems I: Regular Papers.
[9] Jacek Kowalski. 0.8 μm CMOS implementation of weighted-order statistic image filter based on cellular neural network architecture , 2003, IEEE Trans. Neural Networks.
[10] Stephen P. DeWeerth,et al. Analog VLSI circuits for primitive sensory attention , 1994, Proceedings of IEEE International Symposium on Circuits and Systems - ISCAS '94.
[11] Timothy K. Horiuchi,et al. Object-Based Selection Within an Analog VLSI Visual Attention System , 1998 .
[12] Tadashi Shibata,et al. A Computational Digital Pixel Sensor Featuring Block-Readout Architecture for On-Chip Image Processing , 2009, IEEE Transactions on Circuits and Systems I: Regular Papers.
[13] John I. Goutsias,et al. Mathematical Morphology and its Applications to Image and Signal Processing , 2000, Computational Imaging and Vision.
[14] Kari Halonen,et al. An analog array processor hardware realization with multiple new features , 2002, Proceedings of the 2002 International Joint Conference on Neural Networks. IJCNN'02 (Cat. No.02CH37290).
[15] Ari Paasio,et al. Effect of mismatch on a ranked-order extractor array [image processing applications] , 2005, 2005 IEEE International Symposium on Circuits and Systems.
[16] Jan-Erik Eklund,et al. VLSI implementation of a focal plane image processor-a realization of the near-sensor image processing concept , 1996, IEEE Trans. Very Large Scale Integr. Syst..
[17] A.J. Lopez-Martin,et al. High-speed high-precision CMOS analog rank order filter with O(n) complexity , 2005, IEEE Journal of Solid-State Circuits.
[18] Ari Paasio,et al. Rank identification for an analog ranked order filter , 2005, 2005 IEEE International Symposium on Circuits and Systems.
[19] Gilles Privat,et al. Functionally asynchronous array processor for morphological filtering of greyscale images , 1996 .
[20] Luc Vincent,et al. Morphological grayscale reconstruction in image analysis: applications and efficient algorithms , 1993, IEEE Trans. Image Process..
[21] Ari Paasio,et al. A ranked order filter implementation for parallel analog processing , 2004, IEEE Transactions on Circuits and Systems I: Regular Papers.
[22] Lin-Bao Yang,et al. Cellular neural networks: theory , 1988 .