A GHz analog multiplier for UWB communications

A gigahertz wideband analog multiplier is proposed. The multiplier based on the MOS cascade operation circuit. The inputs are in voltage mode and become in current mode after multiplication. The result shows that the multiplier can be applied for UWB communications. The circuit is based on 0.18 mum CMOS technology simulated using HSPICE with level 49.

[1]  Lei Zhou,et al.  A gigahertz wideband CMOS multiplier for UWB transceiver , 2005, 2005 IEEE International Symposium on Circuits and Systems.

[2]  Slawomir Koziel,et al.  1.2V low-power four-quadrant CMOS transconductance multiplier operating in saturation region , 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

[3]  Wanlop Surakampontorn,et al.  A new NMOS four-quadrant analog multiplier , 2005, 2005 IEEE International Symposium on Circuits and Systems.

[4]  Montree Kumngern,et al.  Versatile Dual-Mode Class-AB Four-Quadrant Analog Multiplier , 2008 .

[5]  Remco J. Wiegerink.  A CMOS four-quadrant analog current multiplier , 1991, 1991., IEEE International Sympoisum on Circuits and Systems.

[6]  Edgar Sanchez-Sinencio,et al.  CMOS transconductance multipliers: a tutorial , 1998 .

[7]  Ho-Jun Song,et al.  An MOS four-quadrant analog multiplier using simple two-input squaring circuits with source followers , 1990 .

[8]  Kenneth R. Laker,et al.  Design of analog integrated circuits and systems , 1994 .