FPGA Implementation of Chaotic Oscillators, Their Synchronization, and Application to Secure Communications

Abstract Currently, many research works focused on chaotic topics have been implemented with embedded systems like field-programmable gate arrays (FPGA). Unfortunately, very few works detail the FPGA-based implementation from the mathematical model of a chaotic oscillator, simulation and co-simulation issues, and applications. In this manner, this chapter highlights the simulation of several chaotic oscillators by using three numerical methods, namely, Forward-Euler, Trapezoidal, and fourth-order Runge-Kutta. From the discretized equations of a chaotic oscillator associated with a numerical method, it is detailed how to describe the hardware for FPGA implementation. We show cosimulation results between Simulink and Active-HDL (Hardware Description Language). Finally, three chaotic oscillators that are based on piecewise-linear (PWL) functions, such as saturated nonlinear functions, negative slopes, and sawtooth function, are synchronized and used to transmit an image. Details on the correlation between the chaotic channel and the image are given for each state variable of each chaotic oscillator.