FPGA implementation of modified error normalized LMS adaptive filter for ECG noise removal

High frequency noise and channel noise are dominant in wireless ECG monitoring systems which can be modeled as white Gaussian noise. Least mean square (LMS) algorithm based adaptive filters are the preferred choice for white Gaussian noise removal, because they require fewer computations and less amount of power consumption. Though LMS algorithm is simple to implement in real time systems, it is necessary to modify the LMS algorithm to reduce the mean square error for improved filtering performance. In this paper, a delayed error normalized LMS (DENLMS) adaptive filter is studied with pipelined architecture to remove the white Gaussian noise from ECG signal. The pipelined VLSI architecture is utilized to boost the operational speed of adaptive filter by reducing the critical path using delay elements. The performance of pipelined DENLMS algorithm is compared with ENLMS and DNLMS algorithms. The pipelined DENLMS filter increases the speed of operation and reduces power consumption at the cost of increase in area due to the presence of latches. Virtex 5 FPGA XC5LVX330 Field programmable gate array has been utilized as target chip to determine the speed, logic utilization and power consumption.