A voltage-scalable 10-b pipelined ADC with current-mode amplifier

This paper presents an energy-efficient 10-b pipelined ADC with a current-mode amplifier. The proposed amplifier achieves high gain, low static power consumption and supply voltage scalability without any calibration or timing control. The fabricated ADC in 65-nm CMOS process achieves FOMs of 14.3-to-36.9 fJ/c-s with a supply voltage range from 0.6-V to 1.0-V.

[1]  Jieh-Tsorng Wu,et al.  A 5.37mW 10b 200MS/s dual-path pipelined ADC , 2012, 2012 IEEE International Solid-State Circuits Conference.

[2]  Un-Ku Moon,et al.  A 70MS/s 69.3dB SNDR 38.2fJ/conversion-step time-based pipelined ADC , 2013, 2013 Symposium on VLSI Circuits.

[3]  Boris Murmann,et al.  A 12-b, 30-MS/s, 2.95-mW Pipelined ADC Using Single-Stage Class-AB Amplifiers and Deterministic Background Calibration , 2012, IEEE Journal of Solid-State Circuits.

[4]  Boris Murmann,et al.  A 12-bit, 200-MS/s, 11.5-mW pipeline ADC using a pulsed bucket brigade front-end , 2013, 2013 Symposium on VLSI Circuits.

[5]  Un-Ku Moon,et al.  A 75.9dB-SNDR 2.96mW 29fJ/conv-step ringamp-only pipelined ADC , 2013, 2013 Symposium on VLSI Circuits.

[6]  H. Ellis ms , 1998, The Lancet.

[7]  Hae-Seung Lee,et al.  A 12 b 5-to-50 MS/s 0.5-to-1 V Voltage Scalable Zero-Crossing Based Pipelined ADC , 2012, IEEE Journal of Solid-State Circuits.

[8]  Byungsub Kim,et al.  A 10-bit 25-MS/s 1.25-mW Pipelined ADC With a Semidigital Gm-Based Amplifier , 2013, IEEE Transactions on Circuits and Systems II: Express Briefs.