Performance Improvement Versus CPW and Loss Distribution Analysis of Slow-Wave CPW in 65 nm HR-SOI CMOS Technology
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A. Siligaris | E. Pistono | P. Ferrari | Xiao-Lan Tang | P. Vincent | J. Fournier | A. Siligaris | P. Vincent | J. Fournier | E. Pistono | P. Ferrari | A. Franc | Xiao-Lan Tang | A-L Franc
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