This paper presents a comparative simulation modeling of the performance of the uniprocessor, single-bus multiprocessor, and two-bus multipro cessor computer systems. The performance indexes of the single-bus and two-bus multiprocessor systems compared to the uniprocessor system, that are used in the modeling, are processor speedup factors SP1 and SP2 respectively. A third perfor mance index, Bus-speedup factor, SB, is derived to compare the performance of the two-bus and single- bus systems. The first two indexes provide measures of the processing speedup improvement of both multiprocessors with respect to the uniprocessor system, while the third index provides a measure of the performance improvement resulting from adding an extra bus to the single- bus multiprocessor system. Three data transfer protocols are considered in this work: First Come First Served (FCFS), Token Ring (TR), and the Priority (PR) Policy. Simulation experiments show that increasing the number of processors in the considered multiprocessor architectures does not necessarily improve the overall performance. Moreover, adding an extra bus to the single- bus architecture provides some speedup improvement that depends on the nature of the task program and the data transfer protocol. Simulation results show that FCFS and TR scheduling policies provide better performance than the PR policy. However, FCFS requires relatively less hardware and software complexity than the TR.
[1]
Keki B. Irani,et al.
A Closed-Form Solution for the Perfornance Analysis of Multiple-Bus Multiprocessor Systems
,
1984,
IEEE Transactions on Computers.
[2]
A. C. Liu,et al.
Modeling and Performance Analysis of Single-Bus Tightly-Coupled Multiprocessors
,
1989,
IEEE Trans. Computers.
[3]
Marco Ajmone Marsan,et al.
Markov Models for Multiple Bus Multiprocessor Systems
,
1982,
IEEE Transactions on Computers.
[4]
Mohammad S. Obaidat.
Performance evaluation of the IMPS multiprocessor system
,
1989
.
[5]
Kang G. Shin,et al.
Performance Modeling and Measurement of Real-Time Multiprocessors with Time-Shared Buses
,
1988,
IEEE Trans. Computers.
[6]
Philip Heidelberger,et al.
Computer Performance Evaluation Methodology
,
1984,
IEEE Transactions on Computers.
[7]
Marco Ajmone Marsan,et al.
Comparative Performance Analysis of Single Bus Multiprocessor Architectures
,
1982,
IEEE Transactions on Computers.
[8]
David Wei-Luen Yen.
Performance Models for Multiprocessor Computer Systems.
,
1980
.
[9]
Mohammad S. Obaidat.
Simulation of queueing models in computer systems
,
1990
.