论文信息 - An ultra-low R/sub ons/ in 4H-SiC vertical MOSFET: buried channel double-epitaxial MOSFET

An ultra-low R/sub ons/ in 4H-SiC vertical MOSFET: buried channel double-epitaxial MOSFET

This study developed a novel 4H-SiC vertical MOSFET device structure, named double-epitaxial MOSFET (DEMOSFET). In the structure, the p-well is composed of two p-type epitaxial layers, while an n-type region between the p-wells is formed by low-dose n-type ion implantation. A buried channel is formed at the surface of the upper p/sup -/ epitaxial layer. A fabricated DEMOSFET showed an on-resistance of 8.5 m/spl Omega/cm/sup 2/ at a gate voltage of 15 V when the blocking voltage is 600 V. The simulation results revealed that the characteristics largely depend on the profile of the nitrogen in the n-type region between the p-wells.

[1] K. Adachi,et al. High channel mobility in normally-off 4H-SiC buried channel MOSFETs , 2001, IEEE Electron Device Letters.

[2] Peter Friedrichs,et al. Detailed investigation of n-channel enhancement 6H-SiC MOSFETs , 1999 .

[3] A. Agarwal,et al. 10 A, 2.4 kV Power DiMOSFETs in 4H-SiC , 2002, IEEE Electron Device Letters.

[4] John W. Palmour,et al. High-Current, NO-Annealed Lateral 4H-SiC MOSFETs , 2002 .

[5] P. Friedrichs,et al. 4H-SiC Power MOSFET Blocking 1200V with a Gate Technology Compatible with Industrial Applications , 2003 .

[6] Kenji Fukuda,et al. Correlation between channel mobility and shallow interface traps in SiC metal–oxide–semiconductor field-effect transistors , 2002 .

[7] P. Friedrichs,et al. Significantly improved performance of MOSFETs on silicon carbide using the 15R-SiC polytype , 1999, IEEE Electron Device Letters.