论文信息 - Parallel Simulation of Fully Associative Caches

Parallel Simulation of Fully Associative Caches

In this paper, a spreadsheet is used for the performance analysis of cache-based multiprocessors for general-purpose computing. The Lotus 1-2-3 spreadsheet is used to study the behavior of the cache miss ratio and the bus bandwidth with respect to the cache line size. The simulation is characterized by its low cost, flexibility and simplicity. The suitability of this tool for educational purposes and its use in an advanced computer architecture course are also discussed.

Santosh G. Abraham | Rabin A. Sugumar

[1] Michel Dubois,et al. Throughput Analysis of Cache-Based Multiprocessors with Multiple Buses , 1988, IEEE Trans. Computers.

[2] Michael R. Smith. A Microprogrammable Microprocessor Simulator and Development System , 1984, IEEE Transactions on Education.

[3] Yongmin Kim,et al. Development and Implementation of an Educational Simulator Software Package for a Specific Microprogramming Architecture , 1986, IEEE Transactions on Education.

[4] Janak H. Patel,et al. Shared Cache for Multiple-Stream Computer Systems , 1983, IEEE Transactions on Computers.

[5] Janak H. Patel,et al. Accurate Low-Cost Methods for Performance Evaluation of Cache Memory Systems , 1988, IEEE Trans. Computers.

[6] Richard R. Eckert,et al. A Microprogrammed Computer Simulator , 1987, IEEE Transactions on Education.

[7] Lubomir Bic. MICOS: A microprogrammable computer simulator , 1984 .

[8] Hassan Diab,et al. A computer-aided teaching package for microprocessor systems education , 1991 .

[9] C. R. Thomas. Three methods for performing conditional looping in a spreadsheet , 1992 .

[10] Alan Jay Smith,et al. Evaluating Associativity in CPU Caches , 1989, IEEE Trans. Computers.

[11] Alan Jay Smith,et al. Line (Block) Size Choice for CPU Cache Memories , 1987, IEEE Transactions on Computers.