A SystemC-Based Design Methodology for Digital Signal Processing Systems

Digital signal processing algorithms are of big importance in many embedded systems. Due to complexity reasons and due to the restrictions imposed on the implementations, new design methodologies are needed. In this paper, we present a SystemC-based solution supporting automatic design space exploration, automatic performance evaluation, as well as automatic system generation for mixed hardware/software solutions mapped onto FPGA-based platforms. Our proposed hardware/software codesign approach is based on a SystemC-based library called SysteMoC that permits the expression of different models of computation well known in the domain of digital signal processing. It combines the advantages of executability and analyzability of many important models of computation that can be expressed in SysteMoC. We will use the example of an MPEG-4 decoder throughout this paper to introduce our novel methodology. Results from a five-dimensional design space exploration and from automatically mapping parts of the MPEG-4 decoder onto a Xilinx FPGA platform will demonstrate the effectiveness of our approach.

[1]  Teresa H. Y. Meng,et al.  A comparison of fast inverse discrete cosine transform algorithms , 1994, Multimedia Systems.

[2]  Ed F. Deprettere,et al.  An Approach for Quantitative Analysis of Application-Specific Dataflow Architectures , 1997, ASAP.

[3]  Edward A. Lee,et al.  Software Synthesis from Dataflow Graphs , 1996 .

[4]  Sorin A. Huss,et al.  Real-Time Operating System Services for Realistic SystemC Simulation Models of Embedded Systems , 2004, FDL.

[5]  R. K. Ursem.  Multi-objective Optimization using Evolutionary Algorithms , 2009 .

[6]  Charles Gide,et al.  Cours d'économie politique , 1911 .

[7]  Andy D. Pimentel,et al.  A systematic approach to exploring embedded system architectures at multiple abstraction levels , 2006, IEEE Transactions on Computers.

[8]  Jürgen Teich,et al.  FunState-an internal design representation for codesign , 1999, 1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051).

[9]  Christian Haubelt,et al.  Improving EA-based design space exploration by utilizing symbolic feasibility tests , 2005, GECCO '05.

[10]  Hiren D. Patel,et al.  SystemC Kernel Extensions for Hetero-geneous System Modeling , 2004 .

[11]  Giorgio Buttazzo,et al.  Hard Real-Time Computing Systems: Predictable Scheduling Algorithms and Applications , 1997 .

[12]  Vilfredo Pareto,et al.  Cours d'économie politique : professé à l'Université de Lausanne , 1896 .

[13]  Matthias Gries,et al.  Methods for evaluating and covering the design space during early design development , 2004, Integr..

[14]  Timo Hämäläinen,et al.  UML-based multiprocessor SoC design framework , 2006, TECS.

[15]  Shuvra S. Bhattacharyya,et al.  CHARMED: a multi-objective co-synthesis framework for multi-mode embedded systems , 2004 .

[16]  G.S. Moschytz,et al.  Practical fast 1-D DCT algorithms with 11 multiplications , 1989, International Conference on Acoustics, Speech, and Signal Processing,.

[17]  Thorsten Grotker,et al.  System Design with SystemC , 2002 .

[18]  Shuvra S. Bhattacharyya,et al.  Efficient simulation of critical synchronous dataflow graphs , 2006, 2006 43rd ACM/IEEE Design Automation Conference.

[19]  Ed F. Deprettere,et al.  Multi-processor system design with ESPAM , 2006, Proceedings of the 4th International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS '06).

[20]  Gilles Kahn,et al.  The Semantics of a Simple Language for Parallel Programming , 1974, IFIP Congress.

[21]  Shuvra S. Bhattacharyya,et al.  CHARMED: a multi-objective co-synthesis framework for multi-mode embedded systems , 2004, Proceedings. 15th IEEE International Conference on Application-Specific Systems, Architectures and Processors, 2004..

[22]  Sorin A. Huss,et al.  AUTOMATIC GENERATION OF SCHEDULED SYSTEMC MODELS OF EMBEDDED SYSTEMS FROM EXTENDED TASK GRAPHS , 2003 .

[23]  Rainer Leupers,et al.  A modular simulation framework for spatial and temporal task mapping onto multi-processor SoC platforms , 2005, Design, Automation and Test in Europe.

[24]  Marco Laumanns,et al.  SPEA2: Improving the Strength Pareto Evolutionary Algorithm For Multiobjective Optimization , 2002 .

[25]  Edward A. Lee,et al.  A framework for comparing models of computation , 1998, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[26]  Gul Agha,et al.  Abstracting Interaction Patterns: A Programming Paradigm for Open Distributed Systems , 1997 .

[27]  Jean A. Peperstraete,et al.  Cycle-static dataflow , 1996, IEEE Trans. Signal Process..

[28]  Luciano Lavagno,et al.  Metropolis: An Integrated Electronic System Design Environment , 2003, Computer.

[29]  Ed F. Deprettere,et al.  A trace transformation technique for communication refinement , 2001, CODES '01.

[30]  Fernando Herrera,et al.  Modeling of CSP, KPN and SR Systems with SystemC , 2003, FDL.

[31]  Karsten Strehl,et al.  Symbolic methods applied to formal verification and synthesis in embedded systems design , 2000 .

[32]  Viktor K. Prasanna,et al.  Rapid design space exploration of heterogeneous embedded systems using symbolic search and multi-granular simulation , 2002, LCTES/SCOPES '02.

[33]  Trac D. Tran,et al.  Fast multiplierless approximation of the DCT with the lifting scheme , 2000, SPIE Optics + Photonics.

[34]  Edward A. Lee,et al.  Taming heterogeneity - the Ptolemy approach , 2003, Proc. IEEE.

[35]  Trac D. Tran,et al.  Fast multiplierless approximations of the DCT with the lifting scheme , 2001, IEEE Trans. Signal Process..

[36]  Christian Haubelt,et al.  Task-accurate performance modeling in SystemC for real-time multi-processor architectures , 2006, Proceedings of the Design Automation & Test in Europe Conference.

[37]  Edward A. Lee,et al.  Actor-oriented control system design: a responsible framework perspective , 2004, IEEE Transactions on Control Systems Technology.

[38]  Guang R. Gao,et al.  A novel framework of register allocation for software pipelining , 1993, POPL '93.

[39]  Lothar Thiele,et al.  Conflicting Criteria in Embedded System Design , 2000, IEEE Des. Test Comput..

[40]  Christian Haubelt,et al.  Efficient Representation and Simulation of Model-Based Designs , 2006, FDL.

[41]  Bart Kienhuis,et al.  Design space exploration of stream-based dataflow architectures: methods and tools , 1999 .

[42]  Sandeep K. Shukla,et al.  Towards a heterogeneous simulation kernel for system-level models: a SystemC kernel for synchronous data flow models , 2005, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[43]  Christian Haubelt.  Automatic model based design space exploration for embedded systems: a system level approach , 2005 .

[44]  Eckart Zitzler,et al.  Evolutionary algorithms for multiobjective optimization: methods and applications , 1999 .

[45]  Joseph Buck,et al.  Heterogeneous modeling and simulation of embedded systems in El Greco , 2000, CODES '00.

[46]  Alexandru Turjan,et al.  System design using Khan process networks: the Compaan/Laura approach , 2004, Proceedings Design, Automation and Test in Europe Conference and Exhibition.

[47]  Shuvra S. Bhattacharyya,et al.  Software synthesis from the dataflow interchange format , 2005, SCOPES '05.

[48]  Stamatis Vassiliadis,et al.  DCT and IDCT Implementations on Different FPGA Technologies , 2022 .

[49]  Martin Lukasiewycz,et al.  Improving system level design space exploration by incorporating SAT-solvers into multi-objective evolutionary algorithms , 2006, IEEE Computer Society Annual Symposium on Emerging VLSI Technologies and Architectures (ISVLSI'06).

[50]  Francisco Javier,et al.  Refining a high level systemC model , 2003 .

[51]  Sorin A. Huss,et al.  An integrated SystemC framework for real-time scheduling assessments in system level , 2004 .

[52]  Jürgen Teich,et al.  System-Level Synthesis Using Evolutionary Algorithms , 1998, Des. Autom. Embed. Syst..

[53]  Christian Haubelt,et al.  Improving Automatic Design Space Exploration by Integrating Symbolic Techniques into Multi-Objective Evolutionary Algorithms , 2006 .

[54]  Sandeep K. Shukla,et al.  SystemC Kernel extensions for heterogeneous system modeling - a framework for multi-MoC modeling and simulation , 2004 .

[55]  Edward A. Lee,et al.  Static Scheduling of Synchronous Data Flow Programs for Digital Signal Processing , 1989, IEEE Transactions on Computers.

[56]  E.A. Lee,et al.  A comparison of synchronous and cycle-static dataflow , 1995, Conference Record of The Twenty-Ninth Asilomar Conference on Signals, Systems and Computers.

[57]  Ed F. Deprettere,et al.  Exploring Embedded-Systems Architectures with Artemis , 2001, Computer.

[58]  E.A. Lee,et al.  Synchronous data flow , 1987, Proceedings of the IEEE.