A 2.4GHz CMOS LNA with full ESD protection

This paper proposed a CMOS LNA with full ESD protection, which means that all pads of this circuit can sustain a HBM stress up to 2kV under various zapping modes. Using all standard devices provided by the foundry with their parasitic included, the verification of the ESD performance in the circuit design process can be executed very easily and the results are reliable. Besides of the remarkable ESD performance, this circuit also provides excellent performance in other aspects: 23 dB gain at 2.4GHz, about 3 dB NF, -20.8 dBm input P1dB compression point, -15 dBm IIP3. The total circuit draws 20mA current from a 1.8V power supply voltage.

[1]  Tung-Yang Chen,et al.  ESD protection design on analog pin with very low input capacitance for high-frequency or current-mode applications , 2000, IEEE Journal of Solid-State Circuits.

[2]  P. Leroux,et al.  A 0.8 dB NF ESD-protected 9 mW CMOS LNA , 2001, 2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177).

[3]  Bingxue Shi,et al.  Two CMOS LNAs Sharing the Same On-Chip Inductors and Bias Network , 2002 .

[4]  Kartikeya Mayaram,et al.  Analysis of CMOS RF LNAs with ESD protection , 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

[5]  M. Steyaert,et al.  High-performance 5.2 GHz LNA with on-chip inductor to provide ESD protection , 2001 .

[6]  R. Fujimoto,et al.  A 7-GHz 1.8dB NF CMOS low noise amplifier , 2002, Proceedings of the 27th European Solid-State Circuits Conference.