Accurate modeling of simultaneous switching noise in low voltage digital VLSI
暂无分享,去创建一个
[1] J. L. Prince,et al. Simultaneous switching ground noise calculation for packaged CMOS devices , 1991 .
[2] J. L. Prince,et al. Effect of CMOS driver loading conditions on simultaneous switching noise , 1994 .
[3] G.A. Katopis,et al. Delta-I noise specification for a high-performance computing machine , 1985, Proceedings of the IEEE.
[4] A. R. Newton,et al. Alpha-power law MOSFET model and its applications to CMOS inverter delay and other formulas , 1990 .
[5] A. J. Rainal. Computing inductive noise of chip packages , 1984, AT&T Bell Laboratories Technical Journal.
[6] L.W. Linholm,et al. An optimized output stage for MOS integrated circuits , 1975, IEEE Journal of Solid-State Circuits.
[7] S. R. Vemuru,et al. Accurate simultaneous switching noise estimation including velocity-saturation effects , 1996 .