Using a domain specific language for SDR to facilitate radar signal processing in heterogeneous computing architectures

This paper presents the use of a Domain-Specific Language (DSL) for Software Defined Radio (SDR) in a Radar digital signal processing (DSP) using heterogeneous computing architectures (HCAs). These HCAs are a combinations of mul-ticore CPU, GPUs, and FPGAs. This DSL, which we named OptiSDR, uses a dataflow-like model of computations named parallel stream processing and a compiler guided optimization technique to provide optimized parallel executable patterns for a hybrid MCPU-GPU architecture. In this paper, we demonstrate the capabilities of OptiSDR in a Radar DSP case study, and show how OptiSDR achieves up to 50 times (50X) speed-up as compared to the hand-crafted Matlab and Octave scripts for the NetRAD pulse compression algorithm. We also show that, while hand-crafted CUDA-Qt implementation of the same pulse compression algorithm presents up to 2X speed-up against Op-tiSDR, this was minimized using platform-specific optimizations by efficiently utilizing available computing resources such as number of GPUs, memory, and number of cores of a MCPU.

[1]  Simon Winberg,et al.  A domain-specific language to facilitate software defined radio parallel executable patterns deployment on heterogeneous architectures , 2014, 2014 IEEE 33rd International Performance Computing and Communications Conference (IPCCC).

[2]  Seungwon Choi,et al.  Implementation of an SDR platform using GPU and its application to a 2 × 2 MIMO WiMAX system , 2011 .

[3]  Robert F. Lucas,et al.  Compiler-assisted performance tuning , 2007 .

[4]  Marco Bekooij,et al.  Temporal analysis model extraction for optimizing modal multi-rate stream processing applications , 2014, SCOPES.

[5]  Gene Frantz,et al.  ADVANCEMENTS IN DIGITAL SIGNAL PROCESSING TECHNOLOGY ARE ENABLING ITS USE FOR INCREASINGLY WIDESPREAD APPLICATIONS . DEVELOPERS WILL BE CHALLENGED TO USE THIS PROCESSING POWER TO ITS UTMOST , WHILE CREATING NEW APPLICATIONS AND IMPROVING EXISTING ONES , 2022 .

[6]  Rudolf Eigenmann,et al.  Portable section-level tuning of compiler parallelized applications , 2012, 2012 International Conference for High Performance Computing, Networking, Storage and Analysis.

[7]  Nick Johnson,et al.  Input-aware auto-tuning for directive-based GPU programming , 2013, GPGPU@ASPLOS.

[8]  Pingfan Meng,et al.  FPGA-GPU-CPU heterogenous architecture for real-time cardiac physiological optical mapping , 2012, 2012 International Conference on Field-Programmable Technology.

[9]  Sander Stuijk,et al.  Throughput Analysis of Synchronous Data Flow Graphs , 2006, Sixth International Conference on Application of Concurrency to System Design (ACSD'06).

[10]  Kunle Olukotun,et al.  Delite , 2014, ACM Trans. Embed. Comput. Syst..

[11]  Michael R. Inggs,et al.  NetRAD multistatic sea clutter database , 2012, 2012 IEEE International Geoscience and Remote Sensing Symposium.

[12]  Jeremy Kepner.  High Performance Computing Productivity Model Synthesis , 2004, Int. J. High Perform. Comput. Appl..