Computation of Pinched Hysteresis Loop Area From Memristance-vs-State Map

The voltage-current characteristic of memristor driven by sinusoidal signal has the shape of hysteresis loop pinched at the origin. The lobe area of the hysteresis loop has been computed so far either from the voltage-current plane for all types of memristors or from the constitutive relation in the flux-charge plane of ideal memristor. In this brief, we provide an alternative approach in computing the lobe area from the memristance-versus-state map of ideal and ideal generic memristors driven by sinusoidal or periodic continuous piecewise linear signal with zero dc component. The applicability of the proposed approach is demonstrated through a number of examples.