A FPGA Core Generator for Embedded Classification Systems

We describe in this work a Core Generator for Pattern Recognition tasks. This tool is able to generate, according to user requirements, the hardware description of a digital architecture, which implements a Support Vector Machine, one of the current state-of-the-art algorithms for Pattern Recognition. The output of the Core Generator consists of a high-level language hardware core description, suitable to be mapped on a reconfigurable device, like a Field Programmable Gate Array (FPGA). As an example of the use of our tool, we compare different solutions, by targeting several reconfigurable devices, and implement the recognition part of a machine vision system for automotive applications.

[1]  A. Ghio,et al.  A Support Vector Machine based pedestrian recognition system on resource-limited hardware architectures , 2007, 2007 Ph.D Research in Microelectronics and Electronics Conference.

[2]  Davide Anguita,et al.  A digital architecture for support vector machines: theory, algorithm, and FPGA implementation , 2003, IEEE Trans. Neural Networks.

[3]  Corinna Cortes,et al.  Support-Vector Networks , 1995, Machine Learning.

[4]  Chih-Jen Lin,et al.  A study on reduced support vector machines , 2003, IEEE Trans. Neural Networks.

[5]  Bernhard Schölkopf,et al.  A Direct Method for Building Sparse Kernel Learning Algorithms , 2006, J. Mach. Learn. Res..

[6]  Davide Anguita,et al.  A support vector machine with integer parameters , 2008, Neurocomputing.

[7]  Luca Zanni,et al.  A parallel solver for large quadratic programs in training support vector machines , 2003, Parallel Computing.

[8]  Jochen A. G. Jess,et al.  Designing electronic engines with electronic engines: 40 years ofbootstrapping of a technology upon itself , 2000, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[9]  Dariu Gavrila,et al.  An Experimental Study on Pedestrian Classification , 2006, IEEE Transactions on Pattern Analysis and Machine Intelligence.

[10]  Dong Sun,et al.  Development of a New Robot Controller Architecture with FPGA-Based IC Design for Improved High-Speed Performance , 2007, IEEE Transactions on Industrial Informatics.

[11]  Jeffrey M. Arnold.  The Architecture and Development Flow of the S5 Software Configurable Processor , 2007, J. VLSI Signal Process..

[12]  Stamatis Vassiliadis,et al.  A sum of absolute differences implementation in FPGA hardware , 2002, Proceedings. 28th Euromicro Conference.

[13]  Thomas G. Dietterich.  What is machine learning? , 2020, Archives of Disease in Childhood.

[14]  Thorsten Joachims,et al.  Text Categorization with Support Vector Machines: Learning with Many Relevant Features , 1998, ECML.

[15]  Javier Hormigo,et al.  SAD computation based on online arithmetic for motion estimation , 2006, Microprocess. Microsystems.

[16]  Davide Anguita,et al.  Feed-Forward Support Vector Machine Without Multipliers , 2006, IEEE Transactions on Neural Networks.

[17]  Davide Anguita,et al.  A Hardware-friendly Support Vector Machine for Embedded Automotive Applications , 2007, 2007 International Joint Conference on Neural Networks.

[18]  Mahesan Niranjan,et al.  Uncertainty in geometric computations , 2002 .

[19]  Enrique Alba,et al.  Using Variable Neighborhood Search to improve the Support Vector Machine performance in embedded automotive applications , 2008, 2008 IEEE International Joint Conference on Neural Networks (IEEE World Congress on Computational Intelligence).

[20]  Octavio Nieto-Taladriz,et al.  Fpga Acceleration for DNA Sequence Alignment , 2007, J. Circuits Syst. Comput..

[21]  Vladimir N. Vapnik,et al.  The Nature of Statistical Learning Theory , 2000, Statistics for Engineering and Information Science.

[22]  Bernhard Schölkopf,et al.  Comparing support vector machines with Gaussian kernels to radial basis function classifiers , 1997, IEEE Trans. Signal Process..

[23]  Octavio Nieto-Taladriz,et al.  Architectural Synthesis of Fixed-Point DSP Datapaths Using FPGAs , 2009, Int. J. Reconfigurable Comput..

[24]  Anil K. Jain,et al.  Statistical Pattern Recognition: A Review , 2000, IEEE Trans. Pattern Anal. Mach. Intell..

[25]  Kung Yao,et al.  Array Processing for Target DOA, Localization, and Classification Based on AML and SVM Algorithms in Sensor Networks , 2003, IPSN.

[26]  Nello Cristianini,et al.  An Introduction to Support Vector Machines and Other Kernel-based Learning Methods , 2000 .

[27]  Michael I. Jordan,et al.  Nonparametric decentralized detection using kernel methods , 2005, IEEE Transactions on Signal Processing.

[28]  James A. Bucklew,et al.  Support vector machine techniques for nonlinear equalization , 2000, IEEE Trans. Signal Process..

[29]  Chih-Jen Lin,et al.  A comparison of methods for multiclass support vector machines , 2002, IEEE Trans. Neural Networks.

[30]  Geoffrey E. Hinton,et al.  Learning internal representations by error propagation , 1986 .