A 90nm-CMOS, 500Mbps, fully-integrated IR-UWB transceiver using pulse injection-locking for receiver phase synchronization

A fully-integrated, 3.1–5GHz Impulse-Radio UWB transceiver with on-chip flash ADC is designed in 90nm-CMOS. A new scheme for receiver phase acquisition is proposed that uses pulse injection-locking to synchronize the receive clock with the transmitted data, eliminating the need for clock/data recovery (CDR). Occupying 2mm2 die area, the transceiver achieves a maximum data rate of 500 Mbps, energy efficiency of 0.18nJ/b at 500Mbps, and a RX-BER of 10−3 across a distance of 10cm at 125Mbps.

[1]  Laurent Ouvry,et al.  A 1.1nJ/b 802.15.4a-compliant fully integrated UWB transceiver in 0.13µm CMOS , 2009, 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.

[2]  Yuanjin Zheng,et al.  A 0.18μm CMOS 802.15.4a UWB Transceiver for Communication and Localization , 2008, 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.

[3]  Huaping Liu,et al.  Transmitter equalization for multipath interference cancellation in impulse radio ultra-wideband(IR-UWB) transceivers , 2009, 2009 International Symposium on VLSI Design, Automation and Test.

[4]  Tao Jiang,et al.  A 0.6mW/Gbps, 6.4–8.0Gbps serial link receiver using local injection-locked ring oscillators in 90nm CMOS , 2009, 2009 Symposium on VLSI Circuits.

[5]  Marian Verhelst,et al.  A reconfigurable, 0.13µm CMOS 110pJ/pulse, fully integrated IR-UWB receiver for communication and sub-cm ranging , 2009, 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.

[6]  David D. Wentzloff,et al.  A 47pJ/pulse 3.1-to-5GHz All-Digital UWB Transmitter in 90nm CMOS , 2007, 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

[7]  I.D. O'Donnell,et al.  A 2.3mW Baseband Impulse-UWB Transceiver Front-End in CMOS , 2006, 2006 Symposium on VLSI Circuits, 2006. Digest of Technical Papers..

[8]  Zhiming Chen,et al.  A 2Gbps RF-correlation-based impulse-radio UWB transceiver front-end in 130nm CMOS , 2009, 2009 IEEE Radio Frequency Integrated Circuits Symposium.

[9]  Anantha Chandrakasan,et al.  A 2.5nJ/b 0.65V 3-to-5GHz Subbanded UWB Receiver in 90nm CMOS , 2007, 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

[10]  Jri Lee,et al.  Subharmonically injection-locked PLLs for ultra-low-noise clock generation , 2009, 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.