Scheduling under data and control dependencies for heterogeneous architectures

This paper presents a list-scheduling algorithm for graphs with data and control dependencies. We assume that tasks are partitioned between hardware resources as scheduling takes place after partitioning in our co-synthesis tool. Control dependencies are introduced by if statements, and model complementary functionalities. A detailed discussion of our algorithm is presented. Extensive experimental work shows the effectiveness of our method for generating close-to-optima schedules in short run-times.

[1]  Thomas M. Chen,et al.  ATM switching systems , 1995 .

[2]  Raul Camposano,et al.  Path-based scheduling for synthesis , 1991, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[3]  Ishfaq Ahmad,et al.  Dynamic Critical-Path Scheduling: An Effective Technique for Allocating Task Graphs to Multiprocessors , 1996, IEEE Trans. Parallel Distributed Syst..

[4]  Hugo De Man,et al.  High-level synthesis for real-time digital signal processing , 1993, The Kluwer international series in engineering and computer science.

[5]  Kazutoshi Wakabayashi,et al.  Global scheduling independent of control dependencies based on condition vectors , 1992, [1992] Proceedings 29th ACM/IEEE Design Automation Conference.

[6]  Minh N. Do,et al.  Youn-Long Steve Lin , 1992 .

[7]  Armin Bender,et al.  Design of an optimal loosely coupled heterogeneous multiprocessor system , 1996, Proceedings ED&TC European Design and Test Conference.

[8]  Frank Vahid,et al.  Specification and Design of Embedded Hardware-Software Systems , 1995, IEEE Des. Test Comput..

[9]  Hironori Kasahara,et al.  Practical Multiprocessor Scheduling Algorithms for Efficient Parallel Processing , 1984, IEEE Transactions on Computers.

[10]  R. Composano,et al.  Path-based scheduling for synthesis , 1990, Twenty-Third Annual Hawaii International Conference on System Sciences.

[11]  Rolf Ernst,et al.  Combining MBP-speculative computation and loop pipelining in high-level synthesis , 1995, Proceedings the European Design and Test Conference. ED&TC 1995.

[12]  Ranga Vemuri,et al.  Hardware software partitioning with integrated hardware design space exploration , 1998, Proceedings Design, Automation and Test in Europe.

[13]  David S. Johnson,et al.  Computers and Intractability: A Guide to the Theory of NP-Completeness , 1978 .