Analysis and Design of a Stacked Power Amplifier With Very High Bandwidth

In order to simplify and optimize the design process of stacked amplifiers, this paper presents a novel analytical method to dimension the input network for ideal output behavior. To verify this new structural design process, a fully integrated stacked power amplifier (PA) in 0.25-μm SiGe BiCMOS technology is proposed. The stacked architecture enables broadband matching networks, therefore the designed PA reaches a very high bandwidth of 800 MHz around 2 GHz. At 2 GHz, the small-signal gain is 23.8 dB. The output power in the 1-dB compression point and the saturated output power are 26.2 and 27.3 dBm, leading to a power-added efficiency (PAE) of 34% and 40%, respectively. Using a long-term evolution (LTE) modulated input signal without any predistortion, the amplifier reaches an average output power of 21 dBm and a PAE of 12%, fulfilling the LTE specifications in terms of adjacent channel leakage ratio and error vector magnitude.

[1]  Jinho Jeong,et al.  A Watt-Level Stacked-FET Linear Power Amplifier in Silicon-on-Insulator CMOS , 2010, IEEE Transactions on Microwave Theory and Techniques.

[2]  P. Asbeck,et al.  A 20 dBm Linear RF Power Amplifier Using Stacked Silicon-on-Sapphire MOSFETs , 2006, IEEE Microwave and Wireless Components Letters.

[3]  F. R. Phelleps,et al.  Monolithic high-voltage FET power amplifiers , 1989, IEEE MTT-S International Microwave Symposium Digest.

[4]  Chih-Chun Shen,et al.  Comparison of enhancement- and depletion-mode triple stacked power amplifiers in 0.5 µm AlGaAs/GaAs PHEMT technology , 2009, 2009 European Microwave Integrated Circuits Conference (EuMIC).

[5]  Eric Kerherve,et al.  A 65nm CMOS fully integrated 31.5 dBm triple SFDS Power Amplifier dedicated to W-CDMA application , 2010, 2010 17th IEEE International Conference on Electronics, Circuits and Systems.

[6]  Bruce A. Wooley,et al.  A stacked 6.5-GHz 29.6-dBm power amplifier in standard 65-nm CMOS , 2010, IEEE Custom Integrated Circuits Conference 2010.

[7]  J. G. McRory,et al.  Transformer coupled stacked FET power amplifiers , 1999 .

[8]  Peter J. Katzin,et al.  A new power amplifier topology with series biasing and power combining of transistors , 1992, IEEE 1992 Microwave and Millimeter-Wave Monolithic Circuits Symposium Digest of Papers.

[9]  Jan-Erik Mueller,et al.  A 1.8GHz wide-band stacked-cascode CMOS power amplifier for WCDMA applications in 65nm standard CMOS , 2011, 2011 IEEE Radio Frequency Integrated Circuits Symposium.

[10]  H.-L.A. Hung,et al.  High-Voltage FET Amplifiers for Satellite and Phased-Array Applications , 1985, 1985 IEEE MTT-S International Microwave Symposium Digest.

[11]  Jan-Erik Mueller,et al.  A 31-dBm, high ruggedness power amplifier in 65-nm standard CMOS with high-efficiency stacked-cascode stages , 2010, 2010 IEEE Radio Frequency Integrated Circuits Symposium.

[12]  Amin K. Ezzeddine,et al.  UHiFET - A new high-frequency High-Voltage device , 2011, 2011 IEEE MTT-S International Microwave Symposium.

[13]  Huei Wang,et al.  Design and Analysis of Stacked Power Amplifier in Series-Input and Series-Output Configuration , 2007, IEEE Transactions on Microwave Theory and Techniques.

[14]  A. K. Ezzeddine,et al.  The high voltage/high power FET (HiVP) , 2003, IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2003.

[15]  F. R. Phelleps,et al.  30-V MMIC power amplifier with novel bias circuitry , 1991, 1991 IEEE MTT-S International Microwave Symposium Digest.

[16]  Chih-Chun Shen,et al.  A broadband stacked power amplifier using 2-µm GaAs HBT process for C-band applications , 2008, 2008 Asia-Pacific Microwave Conference.

[17]  M. Berroth,et al.  A 900-MHz 29.5-dBm 0.13-μm CMOS HiVP Power Amplifier , 2008, IEEE Transactions on Microwave Theory and Techniques.