Reducing DRAM refreshing in an error correction manner

Dynamic random access memory (DRAM) is facing the challenge of technology scaling. The decreasing feature size makes it harder to make DRAM cells which can keep the current data-holding time. When DRAM cells cannot hold data for a long time, DRAM chips need a more frequent refreshing operation. Therefore, in the near future, time and energy cost on DRAM refreshing will be no longer trivial. In this paper, we propose DRAM Error Correction Pointer (ECP), an error-correction-manner framework, to reduce DRAM refreshes without data loss. We exploit the non-uniform feature of DRAM cells with respect to the data retention time. Compared with the conventional refreshing mechanisms, which refresh DRAM chips by the retention time of the leakiest cells, we refresh the chips much fewer times, and treat the not-in-time refreshed cells as fault elements. We use the structure of ECP as a fault tolerant element. By recording the data which are supposed to be written into the leaky cells in our DRAM-ECP structures, DRAM-ECP can significantly decrease refreshing frequency. When these data are to be read out, DRAM-ECP retrieves the data stored in ECPs and covers them to the corresponding position in the data row. Our experiments show that DRAM-ECP can reduce over 70% refreshing operations than the current refreshing mechanism and also get significant energy saving.摘要创新点随着半导体工艺特征尺寸的降低, 在增加 DRAM 存储密度的同时维持原有的数据存储时间越来越困难. 而 DRAM 存储单元数据保持时间的缩短使得 DRAM 的刷新变得更加频繁, 由此带来的能耗和时间代价将不可忽视. 我们提出了 DRAM-ECP, 使用纠错思想的技术降低 DRAM 的刷新频率. 我们充分利用了存储单元数据保持时间的差异特征, 将极少数数据保持时间较短的单元视为故障单元, 将这些单元的数据保存在访存控制器上额外的存储结构中. 这种技术可以大大延长 DRAM 整体刷新周期, 减少超过 70%的 DRAM 的刷新操作, 并可以带来显著的能耗节约.