Design and verification of CMOS HSTL buffers - YF/spl I.bar/HSTL018
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HSTL level standard is technology for high-speed data transmission. Based on the analysis of applications, a couple of I/O buffers named YF_HSTL018, which are fully complied with HSTL level specification, are designed. The layout of the circuit is also realized. Through the Hspice simulation and chip test, good performance of the I/O buffers is demonstrated
[1] Tom Granberg,et al. Handbook Of Digital Techniques For High-speed Design , 2004 .