An analog front-end for the acquisition of biomedical signals, fully integrated in a 0.8 /spl mu/m CMOS process

This work explores the feasibility of a cardiac pacemaker front-end, realized using a fully integrated solution. Particularly two different architectures for the sensing chain are compared. The first is based on an SC biquadratic cell and performs the minimum signal processing required, i.e. a band-pass filtering before peak detection. The second is based on a /spl Sigma//spl Delta/ converter, allowing for more advanced pacing strategies. Both architectures require a low-noise pre-amplifier, realized as a log-domain filter, and pose typical challenges of low-voltage and low-power design. Both circuits, realized in 0.8 /spl mu/m CMOS process, behave as required by the application and have a reduced power consumption. Hence the feasibility of fully-integrated solution is proved, for both sensing approaches, giving the possibility to drastically reduce pacemaker size.

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