MTJ-Based Nonvolatile 9 T SRAM Cell

This paper presents a spin-transfer torquemagnetic tunnel junction (STT-MTJ) based non-volatile 9-transistor (9T) SRAM cell. The cell achieves low power dissipation due to its series connected MTJ elements and read buffer which offer stacking effect. The paper studies the impact of PVT (process, voltage, and temperature) variations on the design metric of the SRAM cell such as write delay and compares the results with non-volatile 8T SRAM cell (NV8T). The proposed design consumes lower leakage power and exhibits narrower spread in write delay compared with NV8T.

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