Testing C-Elements
暂无分享,去创建一个
[1] Michael Kishinevsky,et al. Concurrent hardware : the theory and practice of self-timed design , 1993 .
[2] Alian J. Martin,et al. Testing delay-insensitive circuits , 1991 .
[3] Alain J. Martin. Programming in VLSI: from communicating processes to delay-insensitive circuits , 1991 .
[4] Teresa H. Y. Meng,et al. Semi-modularity and testability of speed-independent circuits , 1992, Integr..
[5] Helmut Jürgensen,et al. A model for sequential machine testing and diagnosis , 1992, J. Electron. Test..
[6] Randal E. Bryant,et al. Performance Evaluation of FMOSSIM, a Concurrent Switch-Level Fault Simulator , 1985, DAC 1985.
[7] Janusz A. Brzozowski,et al. On the Delay-Sensitivity of Gate Networks , 1992, IEEE Trans. Computers.
[8] Edward J. McCluskey. Fundamental mode and pulse mode sequential circuits , 1962 .
[9] Takashi Nanya,et al. Timing-reliability evaluation of asynchronous circuits based on different delay models , 1994, Proceedings of 1994 IEEE Symposium on Advanced Research in Asynchronous Circuits and Systems.