General interface for the WARP1.0 fuzzy processor

This paper deals with the use of WARP1.0 fuzzy processor for the implementation of a fuzzy controller. The internal structure of the WARP1.0 has led to the definition of a general interface in order to facilitate the exchange of data with a host processor. A tentative comparison of performances is done with respect to a fuzzy controller based on a traditional architecture.

[1]  Leopoldo García Franquelo,et al.  Design of a fuzzy controller mixing analog and digital techniques , 1994, Proceedings of 1994 IEEE 3rd International Fuzzy Systems Conference.

[2]  Manfred Glesner,et al.  Computer-aided design of fuzzy systems based on generic VHDL specifications , 1996, IEEE Trans. Fuzzy Syst..

[3]  TAKESHI YAMAKAWA,et al.  The Current Mode Fuzzy Logic Integrated Circuits Fabricated by the Standard CMOS Process , 1986, IEEE Transactions on Computers.

[4]  J.L. Grantner,et al.  Digital fuzzy logic controller: design and implementation , 1996, IEEE Trans. Fuzzy Syst..

[5]  D. L. Hung Custom design of a hardware fuzzy logic controller , 1994, Proceedings of 1994 IEEE 3rd International Fuzzy Systems Conference.

[6]  Hiroyuki Watanabe,et al.  VLSI fuzzy chip and inference accelerator board systems , 1991, [1991] Proceedings of the Twenty-First International Symposium on Multiple-Valued Logic.

[7]  Masaki Togai,et al.  Expert System on a Chip: An Engine for Real-Time Approximate Reasoning , 1986, IEEE Expert.

[8]  Liliane Peters,et al.  Design and application of an analog fuzzy logic controller , 1996, IEEE Trans. Fuzzy Syst..

[9]  L. Foulloy,et al.  Fuzzy Components for Fuzzy Control , 1994 .

[10]  J. Knobloch,et al.  Optimization of an on-chip fuzzy temperature controller , 1996, Proceedings of North American Fuzzy Information Processing.

[11]  Mototaka Sone,et al.  Fuzzy control design system based on DSP , 1994, Proceedings of 1994 IEEE 3rd International Fuzzy Systems Conference.