Neuro chips with on-chip backprop and/or Hebbian learning

In a neural network, neurons and synapses are two unit functions. If the learning procedures are assigned appropriately, they can be placed in tiling form. This arrangement is potentially expandable if constructed of two separate LSI chips, a synapse chip and a neuron chip. The authors describe such an implementation. A single synapse configuration is shown along with a synapse group with 64 synapses and a learning control circuit. A single neuron functional block diagram is presented, and synapse characteristics are shown.<<ETX>>