Numerical study of read scheme in one-selector one-resistor crossbar array

A comprehensive numerical circuit analysis of read schemes of a one selector–one resistance change memory (1S1R) crossbar array is carried out. Three schemes—the ground, V/2, and V/3 schemes—are compared with each other in terms of sensing margin and power consumption. Without the aid of a complex analytical approach or SPICE-based simulation, a simple numerical iteration method is developed to simulate entire current flows and node voltages within a crossbar array. Understanding such phenomena is essential in successfully evaluating the electrical specifications of selectors for suppressing intrinsic drawbacks of crossbar arrays, such as sneaky current paths and series line resistance problems. This method provides a quantitative tool for the accurate analysis of crossbar arrays and provides guidelines for developing an optimal read scheme, array configuration, and selector device specifications.

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