Multi-application Based Network-on-Chip Design for Mesh-of-Tree Topology Using Global Mapping and Reconfigurable Architecture

This paper outlines a multi-application mapping for Mesh-of-Tree (MoT) topology based Network-on-Chip (NoC) design using reconfigurable architecture. A two phase Particle Swarm Optimization (PSO) has been proposed for reconfigurable architecture to minimize the communication cost. In first phase global mapping is done by combining multiple applications and in second phase, reconfiguration is achieved by switching the cores to near by routers using multiplexers. Experimentations have been carried out for several application benchmarks and synthetic applications generated using TGFF tool. The results show significant improvement in terms of communication cost after reconfiguration.

[1]  Wayne H. Wolf,et al.  TGFF: task graphs for free , 1998, Proceedings of the Sixth International Workshop on Hardware/Software Codesign. (CODES/CASHE'98).

[2]  Chunguang Zhou,et al.  Particle swarm optimization for traveling salesman problem , 2003, Proceedings of the 2003 International Conference on Machine Learning and Cybernetics (IEEE Cat. No.03EX693).

[3]  Ahmet T. Erdogan,et al.  Architecture of a Dynamically Reconfigurable NoC for Adaptive Reconfigurable MPSoC , 2006, First NASA/ESA Conference on Adaptive Hardware and Systems (AHS'06).

[4]  Ashish Sharma,et al.  Multi-Application Network-on-Chip Design using Global Mapping and Local Reconfiguration , 2014, TRETS.

[5]  Jens Sparsø,et al.  ReNoC: A Network-on-Chip Architecture with Reconfigurable Topology , 2008, Second ACM/IEEE International Symposium on Networks-on-Chip (nocs 2008).

[6]  Hamid Sarbazi-Azad,et al.  An efficient dynamically reconfigurable on-chip network architecture , 2010, Design Automation Conference.

[7]  Hamid Sarbazi-Azad,et al.  Application-Aware Topology Reconfiguration for On-Chip Networks , 2011, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[8]  Ashish Sharma,et al.  Application Mapping Onto Mesh-of-Tree Based Network-on-Chip Using Discrete Particle Swarm Optimization , 2012, 2012 International Symposium on Electronic System Design (ISED).

[9]  Santanu Chattopadhyay,et al.  A survey on application mapping strategies for Network-on-Chip design , 2013, J. Syst. Archit..