A compact LCD driver and timing controller system
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This paper describes a new architecture for the control and drive electronics of a liquid crystal panel. An innovative interface between the timing controller and the column drivers solves the problem of extending designs to higher resolutions and larger displays while maintaining compact circuit boards. Three serial data lines per chip replace the conventional parallel data bus for the column data. Within the column driver, a set of six digital to analog converters, DACs, combined with sample and holds for each output, replace the conventional single DAC per output. This provides a highly compact driver chip.
[1] Deog-Kyoon Jeong,et al. A multi-level multi-phase charge-recycling method for low-power AMLCD column drivers , 2000, IEEE Journal of Solid-State Circuits.