High-Speed Photonics for Side-by-Side Integration With Billion Transistor Circuits in Unmodified CMOS Processes

The performance of modern computer systems is limited by the input/output bottleneck problem. Key figures such as bandwidth density, energy efficiency, and reach are compared with state-of-the-art solutions. The latest photonic device library for computercom in the 45 nm silicon-on-insulator (SOI) node is reviewed. It is shown that monolithic integration of photonics and electronics in advanced CMOS nodes offers orders-of-magnitude better figures than standard wirelines and silicon photonic devices for datacom.

[1]  Samuel Williams,et al.  Roofline: an insightful visual performance model for multicore architectures , 2009, CACM.

[2]  Naohiro Takazawa,et al.  3-D-Stacked 16-Mpixel Global Shutter CMOS Image Sensor Using Reliable In-Pixel Four Million Microbump Interconnections With 7.6- $\mu \text{m}$ Pitch , 2016, IEEE Transactions on Electron Devices.

[3]  Rajeev J. Ram,et al.  Single-chip microprocessor that communicates directly using light , 2015, Nature.

[4]  J. C. Rosenberg,et al.  Monolithic silicon photonics at 25 Gb/s , 2016, 2016 Optical Fiber Communications Conference and Exhibition (OFC).

[5]  Vladimir Stojanovic,et al.  Scaling zero-change photonics: An active photonics platform in a 32nm microelectronics SOI CMOS process , 2015, 2015 Conference on Lasers and Electro-Optics (CLEO).

[6]  Rajeev J Ram,et al.  Resonance-enhanced waveguide-coupled silicon-germanium detector , 2016, 1601.00542.

[7]  Cale M. Gentry,et al.  75% efficient wide bandwidth grating couplers in a 45 nm microelectronics CMOS process , 2015, 2015 IEEE Optical Interconnects Conference (OI).

[8]  N. Vulliet,et al.  Recent progress in Silicon Photonics R&D and manufacturing on 300mm wafer platform , 2015, 2015 Optical Fiber Communications Conference and Exhibition (OFC).

[9]  Michael R. Watts,et al.  An ultra low power 3D integrated intra-chip silicon electronic-photonic link , 2015, 2015 Optical Fiber Communications Conference and Exhibition (OFC).

[10]  Rajeev J Ram,et al.  Waveguide-coupled detector in zero-change complementary metal–oxide–semiconductor , 2015 .

[11]  Chen Sun,et al.  A 45 nm CMOS-SOI Monolithic Photonics Platform With Bit-Statistics-Based Resonant Microring Thermal Tuning , 2016, IEEE Journal of Solid-State Circuits.

[12]  R. J. Ram,et al.  Depletion-based optical modulators in a bulk 65 nm CMOS platform , 2016, 2016 Optical Fiber Communications Conference and Exhibition (OFC).

[13]  Rajeev J Ram,et al.  Depletion-mode carrier-plasma optical modulator in zero-change advanced CMOS. , 2013, Optics letters.

[14]  Rajeev J. Ram,et al.  Optimization of high-speed CMOS optical modulators with interleaved junctions , 2016, 2016 Lester Eastman Conference (LEC).

[15]  Vladimir Stojanovic,et al.  Photonics design tool for advanced CMOS nodes , 2015, 1504.03669.

[16]  Jie Sun,et al.  Nanophotonic integration in state-of-the-art CMOS foundries. , 2011, Optics express.

[17]  C. Gunn,et al.  Fully Integrated VLSI CMOS and Photonics "CMOS Photonics" , 2007, 2007 IEEE Symposium on VLSI Technology.

[18]  Luca Alloatti,et al.  Infrared vertically-illuminated photodiode for chip alignment feedback , 2016 .

[19]  Luca Alloatti,et al.  High-speed modulator with interleaved junctions in zero-change CMOS photonics , 2016, Applied Physics Letters.

[20]  Jie Sun,et al.  Open Foundry Platform for High-performance Electronic-photonic Integration References and Links , 2022 .

[21]  John Shalf,et al.  Optical Interconnects and Extreme Computing , 2016 .

[22]  Stefan Lischke,et al.  Silicon photonics for 100 Gbit/s intra-data center optical interconnects , 2016, SPIE OPTO.

[23]  Martin Moehrle,et al.  Recent Developments in the Polymer Photonic Integration Technology , 2016 .