Using OxRRAM memories for improving communications of reconfigurable FPGA architectures

New memories, such as non-volatile resistive memories present bright prospect in catering to the ever-growing memory needs. In this paper, we investigate the usage of Oxide Resistive Random Access Memory (OxRRAM) to improve the communication switchboxes of Field-Programmable-Gate-Arrays (FPGAs). We prove the interest of using unipolar OxRRAM in such devices thanks to a complete methodology, starting from compact model based on self-consistent physical model up to architectural evaluation using typical FPGA benchmarks. Besides, the architectural gains in terms of area by 1.4x and write time by 17.4x in comparison with phase-change memories (PCM). An improvement in area by 4.82x and write time by 285.7x for conventional Flash technology as well as a reduction in overall delay by 49.3% due to the reduced on-resistance and smaller size are reported.

[1]  G. Servalli,et al.  A 45nm generation Phase Change Memory technology , 2009, 2009 IEEE International Electron Devices Meeting (IEDM).

[2]  H. Ishiwara.  Current status and prospects of ferroelectric memories , 2001, International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224).

[3]  B. Cronquist,et al.  A Novel Flash-based FPGA Technology with Deep Trench Isolation , 2007, 2007 22nd IEEE Non-Volatile Semiconductor Memory Workshop.

[4]  Frederick T. Chen,et al.  Low power and high speed bipolar switching with a thin reactive Ti buffer layer in robust HfO2 based RRAM , 2008, 2008 IEEE International Electron Devices Meeting.

[5]  D. Ielmini,et al.  Evidence for threshold switching in the set process of NiO-based RRAM and physical modeling for set, reset, retention and disturb prediction , 2008, 2008 IEEE International Electron Devices Meeting.

[6]  C. Muller,et al.  Self-consistent physical modeling of set/reset operations in unipolar resistive-switching memories , 2011 .

[7]  Vaughn Betz,et al.  Architecture and CAD for Deep-Submicron FPGAS , 1999, The Springer International Series in Engineering and Computer Science.

[8]  M. Hosomi,et al.  A novel nonvolatile memory with spin torque transfer magnetization switching: spin-ram , 2005, IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest..

[9]  R. Waser,et al.  Electrochemical and thermochemical memories , 2008, 2008 IEEE International Electron Devices Meeting.

[10]  Fabien Clermidy,et al.  Emerging memory technologies for reconfigurable routing in FPGA architecture , 2010, 2010 17th IEEE International Conference on Electronics, Circuits and Systems.

[11]  I. Baek,et al.  Multi-layer cross-point binary oxide resistive memory (OxRRAM) for post-NAND storage application , 2005, IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest..

[12]  Sungjoo Hong,et al.  Memory technology trend and future challenges , 2010, 2010 International Electron Devices Meeting.

[13]  K. Tsunoda,et al.  Low Power and High Speed Switching of Ti-doped NiO ReRAM under the Unipolar Voltage Source of less than 3 V , 2007, 2007 IEEE International Electron Devices Meeting.