Adder With Distributed Control

An adder is described for addition of a large number of binary numbers x<inf>j</inf>, j=1, 2, ⋯, m, where x<inf>j</inf>=∑<inf>i</inf>x<inf>ji</inf>⋅ 2ⁱ, x<inf>ji</inf>=0, 1, i=0, 1, ⋯, n-1. The adder's algorithm has two parts: 1) the bits x<inf>ji</inf>are added independently for each binary order i:s<inf>i</inf>=∑<inf>j</inf>x<inf>ji</inf>≦m and the result expressed in the binary form s<inf>i</inf>=∑<inf>k</inf>a<inf>ik</inf>, ⋅ 2^k, a<inf>ik</inf>=0, 1, k=0, 1,⋯, p-1 (where 2^p-1≦m<2^p); 2) the sum y=∑<inf>j</inf>x<inf>j</inf>is formed by adding terms s<inf>ik</inf>·²^i+kas contributions of the bit s<inf>ik</inf>to the total y. A hardware implementation of this algorithm is suggested where the sum s; is obtained by a sequential circuit which reorders the values x<inf>ji</inf>so that their sum s<inf>i</inf>, remains unchanged and so that after the reordering the new values x<inf>ji</inf>ⁱobey the conditions x<inf>j+1,i</inf>≦x<inf>ji</inf>for every j=1, 2,⋯, m-1. The implementation with integrated circuits should be quite rewarding because the control of the circuit is done with independent control elements distributed all over the chip.