Electronics Packaging Technology Update: BGA, CSP, DCA, And Flip Chip

The explosive growth of high‐density packaging has created a tremendous impact on the electronics assembly and manufacturing industry. Ball Grid Array (BGA), Chip Scale Packaging (CSP), Direct Chip Attach (DCA), and flip‐chip technologies are taking the lead in this advanced manufacturing process. Many major equipment makers and leading electronic companies are now gearing up for these emerging and advanced packaging technologies. In this paper, they will be briefly discussed.

[1]  John H. Lau,et al.  Chip on Board: Technologies for Multichip Modules , 1995 .

[2]  J. Lau,et al.  Thermal Stress and Strain in Microelectronics Packaging , 1993 .

[3]  R.N. Master,et al.  Ceramic mini-ball grid array package for high speed device , 1995, 1995 Proceedings. 45th Electronic Components and Technology Conference.

[4]  Seong-Min Lee,et al.  Passivation cracking mechanism in high density memory devices assembled in SOJ packages adopting LOC die attach technique , 1995, 1995 Proceedings. 45th Electronic Components and Technology Conference.

[5]  M. Amagai,et al.  The effect of stress intensity on package cracking in lead-on-chip (LOC) packages , 1995, Proceedings of 1995 Japan International Electronic Manufacturing Technology Symposium.

[6]  P. Lall,et al.  Reliability characterization of the SLICC package , 1996, 1996 Proceedings 46th Electronic Components and Technology Conference.

[7]  K. Kata,et al.  Simple-structure, generally applicable chip-scale package , 1995, 1995 Proceedings. 45th Electronic Components and Technology Conference.

[8]  H. Nakayoshi,et al.  New type LOC adhesive tapes , 1994, 1994 Proceedings. 44th Electronic Components and Technology Conference.

[9]  J. Lau,et al.  Solder Joint Reliability of BGA, CSP, Flip Chip, and Fine Pitch SMT Assemblies , 1996 .

[10]  John H. Lau,et al.  Handbook Of Fine Pitch Surface Mount Technology , 1993 .

[11]  T. Suzuki,et al.  Memory package with LOC structure using new adhesive material , 1994, 1994 Proceedings. 44th Electronic Components and Technology Conference.

[12]  T. Tachikawa,et al.  Chip scale package (CSP) "a lightly dressed LSI chip" , 1994, Proceedings of 16th IEEE/CPMT International Electronic Manufacturing Technology Symposium.

[13]  James Wilson Rose,et al.  Development of GE's plastic thin-zero outline package (TZOP) technology , 1995, 1995 Proceedings. 45th Electronic Components and Technology Conference.

[14]  Hiroshi Iwasaki CSTP (Chip Scale Thin Package) , 1995 .

[15]  John H. Lau,et al.  Handbook Of Tape Automated Bonding , 1992 .

[16]  Young-Gon Kim,et al.  Ultra-thin and crack-free bottom leaded plastic (BLP) package design , 1995, 1995 Proceedings. 45th Electronic Components and Technology Conference.

[17]  Satoshi Tanigawa,et al.  The resin molded chip size package (MCSP) , 1995, Seventeenth IEEE/CPMT International Electronics Manufacturing Technology Symposium. 'Manufacturing Technologies - Present and Future'.