Carbon Nanotube Device Modeling and Circuit Simulation

The development of new technology requires tools at all levels of abstraction. Modeling tools for detailed calculations of the energy band diagrams and device current–voltage characteristics [1] are essential first steps for device physics understanding. At the same time, modeling tools at higher levels of abstraction are required for device design space exploration and circuit design. As an example, for Si CMOS technology, industry-standard tools such as PISCES [2] and SPICE [3] are essential for device design and circuit simulation, respectively. Higher level abstraction tools [4] are used to describe and synthesize circuits at the system level. In this chapter, we describe the development of a device-level model [5] that can be used as a rapid device design space exploration tool (an independent and parallel effort on SWNT-FET modeling can be found in [6]). It is simple enough to be run in a mixed-mode device/circuit simulation environment so that circuit issues can be studied at the device design level. We also describe the development of a circuitcompatible, compact device model [7] capable of large-scale circuit simulations. Using this circuit-compatible device model for SPICE, circuits consisting of a few hundred carbon nanotube transistors can be simulated.

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