A New Routing Algorithm and Its Hardware Implementation
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[1] Frank Rubin. An iterative technique for printed wire routing , 1974, DAC '74.
[2] Y. Sugiyama,et al. Parallel processing of logic module placement , 1984 .
[3] R. Nair,et al. Wire-routing machines—New tools for VLSI physical design , 1983, Proceedings of the IEEE.
[4] Dave Hightower. A solution to line-routing problems on the continuous plane , 1969, DAC '69.
[5] Mark Stefik,et al. A Parallel Bit Map Processor Architecture for DA Algorithms , 1981, 18th Design Automation Conference.
[6] Toshio Kondo,et al. A large scale cellular array processor: AAP-1 , 1985, CSC '85.
[7] Willy M. C. Sansen,et al. A Line-Expansion Algorithm for the General Routing Problem with a Guaranteed Solution , 1980, 17th Design Automation Conference.
[8] Se June Hong,et al. Global Wiring on a Wire Routing Machine , 1982, 19th Design Automation Conference.
[9] C. Y. Lee. An Algorithm for Path Connections and Its Applications , 1961, IRE Trans. Electron. Comput..
[10] O. A. Larvik. An Interactive Routing Program with On-Line Clean-Up of Sketched Routes , 1979, DAC 1979.
[11] William A. Dees,et al. Automated Rip-Up and Reroute Techniques , 1982, DAC 1982.
[12] T. Sudo,et al. An LSI adaptive array processor , 1982, 1982 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.