Resistive-Feedback CMOS Low-Noise Amplifiers for Multiband Applications

Extremely compact resistive-feedback CMOS low-noise amplifiers (LNAs) are presented as a cost-effective alternative to multiple narrowband LNAs using high-Q inductors for multiband wireless applications. Limited linearity and high power consumption of the inductorless resistive-feedback LNAs are analyzed and circuit techniques are proposed to solve these issues. A 12-mW resistive-feedback LNA, based on current-reuse transconductance boosting is presented with a gain of 21 dB and a noise figure (NF) of 2.6 dB at 5 GHz. The LNA achieves an output third-order intercept point (IP3) of 12.3 dBm at 5 GHz by reducing loop-gain rolloff and by improving linearity of individual stages. The active die area of the LNA is only 0.012 mm2. A 9.2-mW tuned resistive-feedback LNA utilizing a single compact low-Q on-chip inductor is presented, showing an improved tradeoff between performance, power consumption, and die area. At 5.5 GHz, the fully integrated LNA achieves a measured gain of 24 dB, an NF of 2 dB, and an output IP3 of 21.5 dBm. The LNA draws 7.7 mA from the 1.2-V supply and has a 3-dB bandwidth of 3.94 GHz (4.04-7.98 GHz). The LNA occupies a die area of 0.022 mm2. Both LNAs are implemented in a 90-nm CMOS process and do not require any costly RF enhancement options.

[1]  Vladimir Aparin,et al.  A cellular-band CDMA 0.25-/spl mu/m CMOS LNA linearized using active post-distortion , 2005, IEEE Journal of Solid-State Circuits.

[2]  Willy Sansen,et al.  Distortion in elementary transistor circuits , 1999 .

[3]  M.T. Reiha,et al.  A 1.2 V reactive-feedback 3.1-10.6 GHz ultrawideband low-noise amplifier in 0.13 /spl mu/m CMOS , 2006, IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, 2006.

[4]  Kwyro Lee,et al.  Highly linear receiver front-end adopting MOSFET transconductance linearization by multiple gated transistors , 2004, IEEE Journal of Solid-State Circuits.

[5]  Qingqing Liang,et al.  On the Excess Noise Factors and Noise Parameter Equations for RF CMOS , 2007, 2007 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems.

[6]  S.S. Taylor,et al.  A 5GHz resistive-feedback CMOS LNA for low-cost multi-standard applications , 2006, 2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers.

[7]  Robert G. Meyer,et al.  Analysis and Design of Analog Integrated Circuits , 1993 .

[8]  L. Larson,et al.  Modified derivative superposition method for linearizing FET low-noise amplifiers , 2004, IEEE Transactions on Microwave Theory and Techniques.

[9]  Dimitri Linten,et al.  An ESD-Protected DC-to-6GHz 9.7mW LNA in 90nm Digital CMOS , 2007, 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

[10]  T.H. Lee,et al.  A 1.5 V, 1.5 GHz CMOS low noise amplifier , 1996, 1996 Symposium on VLSI Circuits. Digest of Technical Papers.

[11]  H. Magnusson,et al.  A 1.8-V wide-band CMOS LNA for multiband multistandard front-end receiver , 2003, ESSCIRC 2004 - 29th European Solid-State Circuits Conference (IEEE Cat. No.03EX705).

[12]  J. Laskar,et al.  A 12 mW, 7.5 GHz Bandwidth, Inductor-less CMOS LNA for Low-Power, Low-Cost, Multi-Standard Receivers , 2007, 2007 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium.

[13]  D. G. Haigh,et al.  Derivative superposition-a linearisation technique for ultra broadband systems , 1996 .

[14]  Joy Laskar,et al.  A 5 GHz, 21 dBm output-IP3 resistive feedback LNA in 90-nm CMOS , 2007, ESSCIRC 2007 - 33rd European Solid-State Circuits Conference.

[15]  M. Tiebout,et al.  ESD-protected CMOS 3-5 GHz wideband LNA+PGA design for UWB , 2005, Proceedings of the 31st European Solid-State Circuits Conference, 2005. ESSCIRC 2005..

[16]  J. Laskar,et al.  A 0.5-6 GHz Improved Linearity, Resistive Feedback 90-nm CMOS LNA , 2006, 2006 IEEE Asian Solid-State Circuits Conference.